SPRADC4 june   2023 AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2AM62A Processor
  6. 3Vision Pre-processing Accelerator (VPAC)
    1. 3.1 Vision Imaging Sub-System (VISS)
    2. 3.2 Lens Distortion Correction (LDC) Block
    3. 3.3 Multi-Scalar (MSC) Block
  7. 4Deep Learning Acceleration
  8. 5Camera Mirror System Data Flow and Latency
  9. 6End-to-End Functional Safety
  10. 7Example Demonstration
    1. 7.1 Hardware Equipment
    2. 7.2 Software Components
    3. 7.3 Latency Measurement
    4. 7.4 Future Improvement on Latency
  11. 8Summary
  12. 9References

3.1 Vision Imaging Sub-System (VISS)

The VISS performs image processing on raw data, which includes wide dynamic range (WDR) merge, defect pixel correction (DPC), lens shading correction (LSC), global and local brightness and contrast enhancement (GLBCE), demosaicing, color conversion, and edge enhancement (EE). VISS can operate on sensor data either in on-the-fly mode or in memory-to-memory mode:

  • On-the-fly mode: camera data goes directly to VPAC for processing without being first stored to memory. This mode is enabled by integrating the imaging pipe inside VISS with the external camera sensor.
  • Memory-to-memory mode: camera data is stored to the memory and VPAC reads the data from memory and then processes the data.

As of Processor SDK release 9.0, only memory-to-memory mode is supported. On-the-fly mode will be supported in future SDK releases.

In addition to performing raw image processing, the VISS also computes image statistics and supports the control loop for auto focus (AF), auto exposure (AE), and auto white balance (AWB).