SPRADH0 August 2024 AM625 , AM6442 , AM69 , TDA4VM
Nearly all real-time industrial control relies on an architecture of periodic computation and communication. Performance estimates for designing solutions are often based on microbenchmarks such as interrupt latency (for example, cyclictest) and some compute benchmarks such as the venerable Dhrystone. EtherCAT® is one of the main industrial Ethernet protocols for control systems in robotics, factory automation, and precise motor drive control. The primary performance metric is the shortest achievable cycle time, with a given number of devices and size of the exchanged data structures. Timing and synchronization stability is another key consideration, both within the controller and within the network. EtherCAT controller (formerly called EtherCAT master) solutions are available for high level operating systems, such as TwinCAT® for Windows® and CODESYS® for Linux, to highly optimized commercial solutions such as icECAT and the open source IgH stack. Some of the optimized designs are able to run on microcontroller cores, and involve different tradeoffs compared to each other and the full featured high-end solutions. This application note explores achievable cycle times on Texas Instruments embedded processors running real-time Linux using the CODESYS EtherCAT stack.