SPRADH9 June   2024 AM6442

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Abbreviations
  5. 2Introduction
    1. 2.1 Peripheral Component Interconnect Express
      1. 2.1.1 Components of PCIe Communication
        1. 2.1.1.1 Root Complex
        2. 2.1.1.2 Repeater
        3. 2.1.1.3 Endpoints
      2. 2.1.2 Signaling
        1. 2.1.2.1 PERST
        2. 2.1.2.2 WAKE and CLKREQ
        3. 2.1.2.3 REFCLK
      3. 2.1.3 PCIe Common Usage
      4. 2.1.4 PCIe Aggregate Throughput
    2. 2.2 PCIe Features on AM64x and AM243x
  6. 3X86 as RC and AM64x as EP
    1. 3.1 Hardware Environment
    2. 3.2 Software Environment
      1. 3.2.1 Building Application
      2. 3.2.2 Usage
  7. 4Test Setup
    1. 4.1 Common Setup for LINUX and WIN
    2. 4.2 Linux Driver (VFIO)
      1. 4.2.1 Prerequisites
      2. 4.2.2 Building
      3. 4.2.3 Deploying
    3. 4.3 Test Application Usage
    4. 4.4 Setup Steps for LINUX PC
      1. 4.4.1 UART Console Output
    5. 4.5 MSI Example
    6. 4.6 Setup Steps for WINDOWS PC
      1. 4.6.1 Prerequisites
      2. 4.6.2 Building
      3. 4.6.3 Deploying
  8. 5PCIe Test Specification
    1. 5.1  Identification and Configuration Functionalities
      1. 5.1.1 Test Case
    2. 5.2  Reference Clock Functionalities
    3. 5.3  Inbound ATU and BAR Functionalities
    4. 5.4  Outbound ATU Functionalities
    5. 5.5  MSI Functionality
    6. 5.6  Downstream Interrupt Functionality
    7. 5.7  Device Power Management State Functionality
    8. 5.8  Function Level Reset Mechanism
    9. 5.9  Legacy Interrupt Mechanism
    10. 5.10 MSI-X Capability
    11. 5.11 Hot Reset Mechanism
  9. 6Windows Example Driver Verification
  10. 7References

5.3 Inbound ATU and BAR Functionalities

Test

Description:

Test to verify if PCIe inbound ATU and BAR configurations work correctly for the TMDS243EVM/TMDS64EVM PCIe EP.

By default, the following BAR configurations are set in Sysconfig for the pcie_enumerate_ep example application:

  1. Inbound Address Translation 0:
    This ATU configuration uses region index 0 with a 32 Kbyte non-prefetchable 32bit memory BAR linked to an external struct bar0_mem. This inbound ATU configuration can not be modified for this test as it is required to ensure functionality with the RC VFIO based sample application ti-sample-vfio.
  2. Inbound Address Translation 1:
    This ATU configuration uses region index 1 with a 64 Mbyte prefetchable 32bit memory BAR linked to an external data buffer bar1_data. This inbound ATU may be modified for this test as it is specifically implemented to test various BAR configurations.
  3. Inbound Address Translation 2:
    This ATU configuration uses region index 2 with a 1 Gbyte non-prefetchable 64bit memory BAR linked to an external data buffer bar2_data. This inbound ATU may be modified for this test as it is specifically implemented to test various BAR configurations.

Execution:

  1. Set desired BAR configurations in Sysconfig file for Inbound Address Translation 1 and 2 for pcie_enumerate_ep application.
  2. Check if desired PCIe EP BARs are configured correctly on Linux-based RC hardware. On boot up the configured BARs can be shown as disabled on PCIe configuration space as shown in the following figure:
    AM6442
  3. Run RC sample application ti-sample-vfio. Open a second Linux terminal and check PCIe EP configuration space. As the program halts after EP initialization and BAR mapping, corresponding BARs can now be enabled (not shown as disabled).
    AM6442
  4. Continue RC sample application ti-sample-vfio. The program can continue normally and end without any failure.
    AM6442

Test

Description

Test to verify if PCIe inbound ATU and extended BAR configurations work correctly for the TMDS243EVM/TMDS64EVM PCIe EP.

For this purpose, up to 6 different BAR configurations are defined for the PCIe EP:

  1. Inbound Address Translation 0:
    This ATU configuration uses region index 0 with a 32 Kbyte non-prefetchable 32bit memory BAR.
  2. Inbound Address Translation 1:
    This ATU configuration uses region index 1 with a 32 Mbyte prefetchable 32bit memory BAR.
  3. Inbound Address Translation 2:
    This ATU configuration uses region index 2 with a 512 Mbyte non-prefetchable 32bit memory BAR.
  4. Inbound Address Translation 3:
    This ATU configuration uses region index 3 with a 128 byte 32bit I/O BAR.
  5. Inbound Address Translation 4:
    This ATU configuration uses region index 4 with a 1 Kbyte 32bit I/O BAR.
  6. Inbound Address Translation 5:
    This ATU configuration uses region index 5 with an 8 Kbyte 32bit. I/O BAR.

Execution:

  1. Set described BAR configurations in Sysconfig file for pcie_enumerate_ep application.
  2. Check if desired PCIe EP BARs are configured correctly on Linux-based RC hardware. On boot up the configured BARs can be shown as disabled on PCIe configuration space as shown in the following figure:
    AM6442
  3. Run RC sample application ti-sample-vfio with parameter testbars. Open a second Linux terminal and check PCIe EP configuration space. As the program halts after VFIO initialization, corresponding BARs can now be enabled (not shown as disabled) as shown in the following figure.
    AM6442
  4. Continue RC sample application ti-sample-vfio. The program can perform an extended BAR test and output BAR information as shown in the following figure.
    AM6442