This function tests CPU core registers and FPU registers for stuck bits. The following CPU registers are tested: ACC, P, XAR0 to XAR7, XT, SP, IFR, IER, DBGIER, ST0, ST1 (excluding IDLESTAT and LOOP bits), and DP. The following FPU registers are tested: R0 to R7, RND32, TF, ZI, NI, ZF, NF bits of STF register, Shadow registers for R0 to R7 and STF. The values of ST0, ST1, DP, IER, IFR, and DBGIER and the save-on-entry XAR registers, STF and the save-on-entry RnH registers, as defined by the compiler calling convention, are saved and restored in this test. Disable interrupts before calling CPU and FPU test API.

The self-test of CPU and FPU is quite similar. First, the test pattern is set to a specific value, such as 0XAAAA, according to the requirements of the agency. During the test, the CPU and FPU register data needs to be stored in the stack, and then the test pattern is written into CPU and FPU registers. After reading the data of these registers, the data are verified whether the data match the preset test pattern. Finally, the CPU and FPU register data are restored from the stack, completing the register self-test of CPU or FPU. The test_application project contains corresponding cases for CPU and FPU self-test, namely STA_CPU_REG and STA_FPU_REG, with the testing functions as STL_CPU_REG_testCPURegisters(bool injectError) and STL_CPU_REG_testFPURegisters(bool injectError). Both functions consist of assembly code, the source code is found at f280013x\source\stl_cpu_reg.asm. Figure 4-4 shows the CPU and FPU registers test structure.

Figure 4-4 CPU, FPU Registers Test Structure

Remember that INTM being set does not prevent interrupts from propagating to the IFR registers, so although this function saves and restores IFR, an interrupt arriving in IFR during this test is cleared by the restore or can cause a failure of this test. If this test needs to be used during runtime, STL_CPU_REG_testCPURegisters() in stl_cpu_reg.asm can be modified to remove the IFR test (and related save and restore). Alternatively, disable all interrupts at the PIE level (PIEIER) or in the case of non-PIE interrupts (like CPU Timers 1 and 2) at the peripheral level and restore them after STL_CPU_REG_checkCPURegisters() completes. Also the IFR test part can be deleted, which is also acceptable for some certification agencies.