SPRADO2A November 2024 – December 2024 AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM62D-Q1
The recommendation is to add a series resistor (with a value that is use case dependent) to limit the current. Externally buffer the GPIO outputs when higher (above the data sheet specified value) current sourcing is required.
Common processor LVCMOS IO interface guidelines:
Verify capacitor loading of the processor output (when any capacitor value is less than 47pF (use case dependent, maximum allowed value) is connected, designer must simulate), slew rate of the input signal (LVCMOS input slew is 1000ns or less), IO compatibility, and fail-safe operation between the processor IOs and attached devices.