Table 1 lists names of the folders and file names in the folders along with the format for all the files that have been included in the SK-AM62-SIP. The SK-AM62-SIP starter kit (SK) evaluation module (EVM) is a stand-alone test and development platform built around the AM6254 system-on-a-chip (SoC) with integrated 512 MB LPDDR4 SDRAM in a single package. AM625SIP processors are comprised of a quad-core 64-bit Arm®-Cortex®-A53 microprocessor and single-core Arm Cortex-M4F MCU. The product overview document is available on SK-AM62-SIP product folder on TI.com for customers to review before downloading the single Zip folder.
| FOLDER (1st Level) | FOLDER (2nd Level) | Files Inside | File Type |
|---|---|---|---|
| ---- | ---- | PROC162E1_Folders_Files_List | XLS |
| 2024 Important Notice | |||
| 1_SCHEMATIC | PROC162E1_Sch_With_Design_Updates..Notes_V1.0 | ||
| PDF -Backup_SK_Schematic | PROC162E1_sch | ||
| ---- | Proc162E1_Schematic_Revision_Readme | ||
| ORCAD | PROC162E1_Sch_With_Design_Updates..Notes_V1.0 | DSN | |
| ORCAD - Backup_SK_Schematic | PROC162E1_SCH | DSN | |
| 2_BOM | ---- | PROC162E1_BOM_With_Design_Updates..Notes_V1.0 | XLS |
| Backup_SK_Schematic_BOM | PROC162E1_BOM | XLS | |
| 3_Board_File | Allegro | PROC162E1_BRD | BRD |
| Simulation Scorecard | AM62x_Simulation_Scorecard | ||
| Altium_ASCII | PROC162E1_BRD | ALG | |
| 4_Gerber | ODBGBR | PROC162E1_ODBGBR | ZIP |
| 274X | PROC162E1_274xGBR | ZIP | |
| IPC-D-356_NETLIST | PROC162E1_BRD | IPC | |
| 5_Gerber_PDF | FAB | PROC162E1_FAB | |
| PCB LAYERS | PROC162E1-LAYERS | ||
| Geber Layers | PROC162E1-LAYERS | ||
| 6_Assembly_Models_Package | 2D | PROC162E1_BASY | DXF |
| PROC162E1_TASY | DXF | ||
| 3D | PROC162E1_3D_STEP | STP | |
| IDF | PROC162E1_BRD | EMP | |
| PROC162E1_BRD | EMN | ||
| Assembly_Drawing_PDF | PROC162E1_ASSEMBLY | ||
| PROC162E1_TASY | |||
| PROC162E1_BASY | |||
| STNL | art_aper + 8 x .ART files | ART | |
| XY-REP | PROC162E1_XY-REP | XLS | |
| 7_PCB_LAYER_STACKUP | --- | SK-AM62-SIP_PROC162E1_Layer_STACKUP |
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