SPRUHJ1I January 2013 – October 2021 TMS320F2802-Q1 , TMS320F28026-Q1 , TMS320F28026F , TMS320F28027-Q1 , TMS320F28027F , TMS320F28027F-Q1 , TMS320F28052-Q1 , TMS320F28052F , TMS320F28052F-Q1 , TMS320F28052M , TMS320F28052M-Q1 , TMS320F28054-Q1 , TMS320F28054F , TMS320F28054F-Q1 , TMS320F28054M , TMS320F28054M-Q1 , TMS320F2806-Q1 , TMS320F28062-Q1 , TMS320F28062F , TMS320F28062F-Q1 , TMS320F28068F , TMS320F28068M , TMS320F28069-Q1 , TMS320F28069F , TMS320F28069F-Q1 , TMS320F28069M , TMS320F28069M-Q1
Section | Memory Usage (16-bit Words) | |
---|---|---|
RAM | Flash | |
Library Interface (.ebss) | 0x018C | × |
Library (.ebss) | 0x0800 | × |
Code (.text) | 0x1F31 | × |
IQmath (.text) | 0x0064 | × |
Table 9-14 summarizes all of the performance data per function, when users' code is loaded and executed from RAM, on a minimum implementation of InstaSPIN library. Notice that CTRL_run is executed from both ROM and RAM. That is because CTRL_run has some function calls to the estimator. For instance, the EST_run function call is executed from CTRL_run, so that will be executed from ROM. Similarly, CTRL_setup has some code that calls some InstaSPIN state machine code, which needs to be executed from ROM because it contains some interaction with the FAST estimator. The difference in Code from the full implementation running from RAM is an additional Offset object added as well as the entire FOC code inlined in the code.
Function Name | CPU Cycles | Executed From | ||||
---|---|---|---|---|---|---|
Min | Avg | Max | ROM | RAM | FLASH | |
HAL_acqAdcInt | 23 | 23 | 23 | × | ✓ | × |
HAL_readAdcData | 106 | 106 | 106 | × | ✓ | × |
Ctrl_run | ✓ | × | × | |||
Rs Online Disabled, ISR vs CTRL = 1, CTRL vs EST = 1 | 2361 | 2372 | 2454 | |||
CTRL vs EST = 2 | 1171 | 1777 | 2454 | |||
CTRL vs EST = 3 | 1171 | 1579 | 2454 | |||
ISR vs CTRL = 2, CTRL vs EST = 1 | 59 | 1215 | 2454 | |||
CTRL vs EST = 2 | 59 | 918 | 2454 | |||
CTRL vs EST = 3 | 59 | 819 | 2454 | |||
ISR vs CTRL = 3, CTRL vs EST = 1 | 59 | 830 | 2454 | |||
CTRL vs EST = 2 | 59 | 631 | 2454 | |||
CTRL vs EST = 3 | 59 | 565 | 2454 | |||
Rs Online Enabled, ISR vs CTRL = 1, CTRL vs EST = 1 | 2825 | 2840 | 2925 | |||
CTRL vs EST = 2 | 1171 | 2012 | 2925 | |||
CTRL vs EST = 3 | 1171 | 1736 | 2925 | |||
ISR vs CTRL = 2, CTRL vs EST = 1 | 59 | 1450 | 2925 | |||
CTRL vs EST = 2 | 59 | 1035 | 2925 | |||
CTRL vs EST = 3 | 59 | 897 | 2925 | |||
ISR vs CTRL = 3, CTRL vs EST = 1 | 59 | 986 | 2925 | |||
CTRL vs EST = 2 | 59 | 710 | 2925 | |||
CTRL vs EST = 3 | 59 | 618 | 2925 | |||
HAL_writePwmData | 62 | 62 | 62 | × | ✓ | × |
CTRL_setup | 36 | 50 | 178 | ✓ | ✓ | × |