SPRUHX5I August 2014 – May 2024 TMS320F28374S , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376S , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378S , TMS320F28379S
The USB interrupt enable 8-bit register (USBIE) provides interrupt enable bits for each of the interrupts in USBIS. At reset interrupts 1 and 2 are enabled in device mode.
Mode(s): | Host | Device |
USBIE in Host Mode is shown in Figure 22-12 and described in Table 22-14.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
VBUSERR | SESREQ | DISCON | CONN | SOF | BABBLE | RESUME | Reserved |
R-W | R-W | R-W | R-W | R-W | R-W | R-W | R-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Value | Description |
---|---|---|---|
7 | VBUSERR | Enable VBUS Error Interrupt | |
0 | The VBUSERR interrupt is suppressed and not sent to the interrupt controller. | ||
1 | An interrupt is sent to the interrupt controller when the VBUSERR bit in the USBIS register is set. | ||
6 | SESREQ | Enable Session Request | |
0 | The SESREQ interrupt is suppressed and not sent to the interrupt controller. | ||
1 | An interrupt is sent to the interrupt controller when the SESREEQ bit in the USBIS register is set. | ||
5 | DISCON | Enable Disconnect Interrupt | |
0 | The DISCON interrupt is suppressed and not sent to the interrupt controller. | ||
1 | An interrupt is sent to the interrupt controller when the DISCON bit in the USBIS register is set. | ||
4 | CONN | Enable Connect Interrupt | |
0 | The CONN interrupt is suppressed and not sent to the interrupt controller. | ||
1 | An interrupt is sent to the interrupt controller when the CONN bit in the USBIS register is set. | ||
3 | SOF | Start of Frame | |
0 | The SOF interrupt is suppressed and not sent to the interrupt controller. | ||
1 | An interrupt is sent to the interrupt controller when the SOF bit in the USBIS register is set. | ||
2 | BABBLE | Babble Detected | |
0 | The BABBLE interrupt is suppressed and not sent to the interrupt controller. | ||
1 | An interrupt is sent to the interrupt controller when the BABBLE bit in the USBIS register is set. | ||
1 | RESUME | RESUME Signaling Detected. This interrupt can only be used if the USB controller's system clock is enabled. If the user disables the clock programming, the USBDRRIS, USBDRIM, and USBDRISC registers should be used. | |
0 | The RESUME interrupt is suppressed and not sent to the interrupt controller. | ||
1 | An interrupt is sent to the interrupt controller when the RESUME bit in the USBIS register is set. | ||
0 | Reserved | 0 | Reserved |
USBIE in Device Mode is shown in Figure 22-11 and described in Table 22-13.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved | DISCON | Reserved | SOF | RESET | RESUME | SUSPEND |
R-0 | R/W-0 | R-0 | R/W-0 | R/W-1 | RW-1 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Value | Description |
---|---|---|---|
7-6 | Reserved | 0 | Reserved |
5 | DISCON | Enable Disconnect Interrupt | |
0 | The DISCON interrupt is suppressed and not sent to the interrupt controller. | ||
1 | An interrupt is sent to the interrupt controller when the DISCON bit in the USBIS register is set. | ||
4 | Reserved | 0 | Reserved |
3 | SOF | Start of frame | |
0 | The SOF interrupt is suppressed and not sent to the interrupt controller. | ||
1 | An interrupt is sent to the interrupt controller when the SOF bit in the USBIS register is set. | ||
2 | RESET | RESET Signaling Detected | |
0 | The RESET interrupt is suppressed and not sent to the interrupt controller. | ||
1 | An interrupt is sent to the interrupt controller when the RESET bit in the USBIS register is set. | ||
1 | RESUME | RESUME Signaling Detected. This interrupt can only be used if the USB controller's system clock is enabled. If the user disables the clock programming, the USBDRRIS, USBDRIM, and USBDRISC registers should be used. | |
0 | The RESUME interrupt is suppressed and not sent to the interrupt controller. | ||
1 | An interrupt is sent to the interrupt controller when the RESUME bit in the USBIS register is set. | ||
0 | SUSPEND | SUSPEND Signaling Detected | |
0 | The SUSPEND interrupt is suppressed and not sent to the interrupt controller. | ||
1 | An interrupt is sent to the interrupt controller when the DISCON bit in the USBIS register is set. |