SPRUHX5I August 2014 – May 2024 TMS320F28374S , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376S , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378S , TMS320F28379S
The uPP transmitter asserts the START signal when it transfers the first word of a data line. A line is defined in terms of the channel’s associated DMA channel; for more on DMA programming concepts, see Section 23.4.2. The START signal is active-high by default, but its polarity is controlled by the STARTPOLA bit in IFCFG register.
In transmit mode, START is an output signal and is always driven, in receive mode, START is an input signal and may be disabled using the STARTA bit in IFCFG register. When the channel is configured in transmit mode with data interleave enabled (SDRTXILA = 1 in CHCTL register), the START signal function changes completely. The START signal now asserts on every data word that is provided by DMA Channel I. For this alternative behavior, see Section 23.4.3.6.