The USB device RESUME interrupt status and clear register (USBDRRIS) is the raw interrupt clear register. On a write of 1, the corresponding interrupt is cleared. A write of 0 has no effect.
USBDRISC is shown in Figure 22-64 and described in Table 22-68.
Figure 22-64 USB Device RESUME Interrupt Status and Clear Register (USBDRISC)
LEGEND: R/W = Read/Write; R = Read only; -n =
value after reset |
Table 22-68 USB Device RESUME
Interrupt Status and Clear Register (USBDRISC) Field DescriptionsBit | Field | Value | Description |
---|
31-1 | Reserved | 0 | Reserved. Reset is 0x0000.000. |
0 | RESUME | | RESUME Interrupt Status and Clear. This bit is cleared by writing a 1. Clearing this bit also clears the RESUME bit in the USBDRCRIS register. |
0 | The RESUME bits in the USBDRRIS and USBDRCIM registers are set, providing an interrupt to the interrupt controller. |
1 | No interrupt has occurred or the interrupt is masked. |