SPRUHZ7K August 2015 – April 2024 AM5706 , AM5708 , AM5716 , AM5718 , AM5718-HIREL
PD_DSP1 contains the following reset domains:
PD_DSP1 contains the CD_DSP1 clock domain.
Table 3-304 lists the logic retention capability for each module of the power domain.
Module | Logic Retention | DFF Context Status | RFF Context Status |
---|---|---|---|
DSP1 | No | RM_DSP1_DSP1_CONTEXT[0] LOSTCONTEXT_DFF | None |