The industrial ethernet timer supports the following features:
- One master 64-bit count-up counter with an overflow status bit.
- Runs on PRUSS_IEP_CLK or PRUSS_GICLK.
- Write 1 to clear status.
- Supports a programmable increment value from 1 to 16 (default 5).
- An optional compensation method allows the increment value to apply compensation increment value from 1 to 16 count up to 224 PRUSS_IEP_CLK/PRUSS_GICLK events with additional slow compensation mode
- 10× 64-bit capture registers:
- 8 capture inputs, with optional synchronous or asynchronous mode:
- 16× 64-bit compare registers: PRUSS_IEP_COMPARE0j/PRUSS_IEP_COMPARE1j (where j=0 to 15) and PRUSS_IEP_COMPARE_STATUS.
- 16 status bits, write 1 to clear
- 16 individual event outputs
- One global event output for interrupt generation triggered by any compare event
- 32 outputs, one high-level and one high-pulse for each compare hit event
- PRUSS_IEP_COMPARE_CFG[0] CMP0_RST_CNT_EN, if enabled, will reset the master counter
- pwm0_sync_out/pwm3_sync_out, if enabled, will reset the master counter
- master counter reset-state is programmable