SPRUHZ7K August 2015 – April 2024 AM5706 , AM5708 , AM5716 , AM5718 , AM5718-HIREL
The PAT maps the tiled data anywhere in the 4-GiB physical address range, with a PAGE granularity. (The TILER page is the granularity of physical memory allocation in the TILER container. Each page is 4kiB).
A PAT view defines the kind of PAT to perform for each page, 8-, 16-, and 32-bit mode access. Each mode in each PAT view can be programmed in two different modes: direct translation and indirect translation.