SPRUIG8J January 2018 – March 2024
This example links three object files named demo.c.obj, filter.c.obj, and tables.obj and creates a program called demo.out.
Assume that target memory has the following program memory configuration:
Address Range | Contents | ||
---|---|---|---|
0x0080 to 0x7000 | On-chip RAM_PG | ||
0xC000 to 0xFF80 | On-chip ROM |
Address Range | Contents | ||
---|---|---|---|
0x0080 to 0x0FFF | RAM block ONCHIP | ||
0x0060 to 0xFFFF | Mapped external addresses EXT |
Address Range | Contents | ||
---|---|---|---|
0x00000020 to 0x00210000 | PMEM | ||
0x00400000 to 0x01400000 | EXT0 | ||
0x01400000 to 0x01800000 | EXT1 | ||
0x02000000 to 0x03000000 | EXT2 | ||
0x03000000 to 0x04000000 | EXT3 | ||
0x40000000 to 0x82000000 | BMEM |
The output sections are constructed in the following manner:
Linker Command File, mylnk.cmd shows the linker command file for this example. Output Map File, demo.map shows the map file.
/****************************************************************************/
/*** Specify Linker Options ***/
/****************************************************************************/
-cr /* --ram_model: load-time initialization */
--heap 0x3000
--stack 0x6000
--args 0x1000
--output_file=demo.out /* Name the output file */
--map_file=demo.map /* Create an output map file */
--undefined_sym=filter_table_A /* Introduce an undefined symbol */
--undefined_sym=filter_table_B /* Introduce an undefined symbol */
/****************************************************************************/
/*** Specify the Input Files ***/
/****************************************************************************/
demo.c.obj
tables.obj
filter.c.obj
/****************************************************************************/
/*** Specify Runtime Support Library to be linked in ***/
/****************************************************************************/
-l libc.a
/****************************************************************************/
/*** Specify the Memory Configuration ***/
/****************************************************************************/
MEMORY
{
PMEM: o = 00000020h l = 0020ffe0h
EXT0: o = 00400000h l = 01000000h
EXT1: o = 01400000h l = 00400000h
EXT2: o = 02000000h l = 01000000h
EXT3: o = 03000000h l = 01000000h
BMEM: o = 40000000h l = 02000000h
}
/****************************************************************************/
/*** Specify the Output Sections ***/
/****************************************************************************/
SECTIONS
{
.text : > PMEM
UNION
{
.tableA: { tables.obj(tableA) } load > BMEM, table(tableA_cpy)
.tableB: { tables.obj(tableB) } load > BMEM, table(tableB_cpy)
} RUN = EXT1, RUN_START(filter_matrix)
GROUP
{
.rodata:
.bss:
} > EXT2
.stack: > BMEM
.args : > BMEM
.cinit: > BMEM
.cio: > BMEM
.const: > BMEM
.data: > BMEM
.sysmem: > BMEM
}
/****************************************************************************/
/*** End of Command File ***/
/****************************************************************************/
Invoke the linker by entering the following command:
cl7x --run_linker mylnk.cmd
This creates the map file shown in Output Map File, demo.map and an output file called demo.out that can be run on a C7000.
OUTPUT FILE NAME: <demo.out>
ENTRY POINT SYMBOL: "_c_int00" address: 000000007ec0
MEMORY CONFIGURATION
name origin length used unused attr fill
---------------------- ------------ -------- -------- -------- ---- --------
PMEM 000000000020 0020ffe0 00008170 00207e70 RWIX
EXT0 000000400000 01000000 00000000 01000000 RWIX
EXT1 000001400000 00400000 00000080 003fff80 RWIX
EXT2 000002000000 01000000 000000b0 00ffff50 RWIX
EXT3 000003000000 01000000 00000000 01000000 RWIX
BMEM 000040000000 02000000 0000a6e4 01ff591c RWIX
SEGMENT ALLOCATION MAP
run origin load origin length init length attrs members
-------------- -------------- ---------- ----------- ----- -------
000000000040 000000000040 00008170 00008170 r-x
000000000040 000000000040 00008140 00008140 r-x .text
000000008180 000000008180 00000030 00000030 r-- .ovly
000001400000 00004000a5e4 00000080 00000080 rw-
000001400000 00004000a5e4 00000080 00000080 rw- .tableA
000001400000 00004000a664 00000080 00000080 rw-
000001400000 00004000a664 00000080 00000080 rw- .tableB
000002000000 000002000000 000000b0 00000000 rw-
000002000000 000002000000 000000b0 00000000 rw- .bss
000040000000 000040000000 00009000 00000000 rw-
000040000000 000040000000 00006000 00000000 rw- .stack
000040006000 000040006000 00003000 00000000 rw- .sysmem
000040009000 000040009000 00001384 00001384 rw-
000040009000 000040009000 00001000 00001000 rw- .args
00004000a000 00004000a000 00000384 00000384 rw- .data
00004000a384 00004000a384 00000140 00000140 r--
00004000a384 00004000a384 00000140 00000140 r-- .const
00004000a4c4 00004000a4c4 00000120 00000000 rw-
00004000a4c4 00004000a4c4 00000120 00000000 rw- .cio
SECTION ALLOCATION MAP
output attributes/
section page origin length input sections
-------- ---- -------------- ---------- ----------------
.text 0 000000000040 00008140
000000000040 00002400 rts7100_le.lib : _printfi.c.obj (.text:__TI_printfi)
000000002440 00000900 : _printfi.c.obj (.text:_pconv_a)
000000002d40 00000800 : _printfi.c.obj (.text:_pconv_g)
000000003540 00000680 : _printfi.c.obj (.text:_pconv_e)
000000003bc0 000003c0 : memory.c.obj (.text:aligned_alloc)
000000003f80 00000380 : frcdivd.c.obj (.text:__TI_frcdivd)
000000004300 00000340 : _printfi.c.obj (.text:_pconv_f)
000000004640 00000300 : _printfi.c.obj (.text:fcvt)
000000004940 00000300 : fputs.c.obj (.text:fputs)
...
.rodata 0 000002000000 00000000 UNINITIALIZED
.bss 0 000002000000 000000b0 UNINITIALIZED
000002000000 000000a0 (.common:__TI_tmpnams)
0000020000a0 00000008 rts7100_le.lib : memory.c.obj (.bss)
0000020000a8 00000008 (.common:parmbuf)
.stack 0 000040000000 00006000 UNINITIALIZED
000040000000 00000010 rts7100_le.lib : boot.c.obj (.stack)
000040000010 00005ff0 --HOLE--
.sysmem 0 000040006000 00003000 UNINITIALIZED
000040006000 00000010 rts7100_le.lib : memory.c.obj (.sysmem)
000040006010 00002ff0 --HOLE--
.args 0 000040009000 00001000
000040009000 00001000 --HOLE-- [fill = 0]
.data 0 00004000a000 00000384
00004000a000 000001e0 rts7100_le.lib : defs.c.obj (.data:_ftable)
00004000a1e0 000000d8 : host_device.c.obj (.data:_device)
00004000a2b8 000000a0 : host_device.c.obj (.data:_stream)
00004000a358 00000010 : exit.c.obj (.data)
00004000a368 00000008 : _lock.c.obj (.data:_lock)
00004000a370 00000008 : _lock.c.obj (.data:_unlock)
00004000a378 00000004 : defs.c.obj (.data)
00004000a37c 00000004 : errno.c.obj (.data)
00004000a380 00000004 : memory.c.obj (.data)
.const 0 00004000a384 00000140
00004000a384 00000101 rts7100_le.lib : ctype.c.obj (.const:.string:_ctypes_)
00004000a485 00000003 --HOLE-- [fill = 0]
00004000a488 00000024 : _printfi.c.obj (.const:.string)
00004000a4ac 00000018 demo.c.obj (.const:.string)
.tableA 0 00004000a5e4 00000080 RUN ADDR = 000001400000
00004000a5e4 00000080 tables.obj (tableA)
.tableB 0 00004000a664 00000080 RUN ADDR = 000001400000
00004000a664 00000080 tables.obj (tableB)
.cinit 0 000040000000 00000000 UNINITIALIZED
.cio 0 00004000a4c4 00000120 UNINITIALIZED
00004000a4c4 00000120 rts7100_le.lib : trgmsg.c.obj (.cio)
.ovly 0 000000008180 00000030
000000008180 00000018 (.ovly:tableA_cpy)
000000008198 00000018 (.ovly:tableB_cpy)
...
LINKER GENERATED COPY TABLES
tableA_cpy @ 00008180 records: 1, size/record: 20, table size: 24
.tableA: load addr=00004000a5e4, load size=00000080, run addr=000001400000,
run size=00000080, compression=none
tableB_cpy @ 00008198 records: 1, size/record: 20, table size: 24
.tableB: load addr=00004000a664, load size=00000080, run addr=000001400000,
run size=00000080, compression=none
GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name
address name
------------ ----
000000008040 C$$EXIT
000000006eb0 C$$IO$$
0000000069c0 HOSTclose
000000006100 HOSTlseek
000000005f80 HOSTopen
...
000000008180 tableA_cpy
000000008198 tableB_cpy
000000007cc0 unlink
000000007d40 wcslen
000000007dc0 write
...
[96 symbols]