SPRUIL1D May 2019 – December 2024 DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4VM , TDA4VM-Q1
All accesses through the PAT must not cross 4-KB page boundaries. The module does check for this condition. If a transaction crosses a 4-KB boundary, the entire transaction will set the bus cflush signal to return an error. The error is also logged in the PAT_EXCEPTION_LOGGING registers and an interrupt can be generated.