SPRUIL1D May 2019 – December 2024 DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4VM , TDA4VM-Q1
External UTC/DRU channels which are managed by the UDMA follow a modified setup sequence which is as follows:
Step | Description | module.mregion.register.field |
---|---|---|
1 | Configure the UTC-DRU starting thread number | udma.gcfg.utc_ctrl.utc_chan_start |
2 | Configure the UTC-DRU to accept TR’s over PSIL | UTC-DRU specific |
3 | Enable the UDMA-C external TX channel | udma.tchanrt.tchanrt[chan]_trt_ctl.tx_enable = 1 |
4 | Enable the UTC-DRU thread | psil.gcfg.enable.enable(bit 31) = 1 (via psilcfg proxy) |