Camera Subsystem unites two camera streaming interfaces – receiver and transmitter, allowing the device to stream video inputs from multiple cameras to the video processing accelerator (VPAC) or to internal memory and to output CSI-2 protocol image data to any device that supports MIPI CSI-2 protocol. Main modules are as follows:
- Camera Streaming Interface Receiver (CSI_RX_IF) with the following main features:
- Compliant to MIPI CSI-2 v1.3+ and MIPI CSI-2 v2.0
- Supports up to 16 virtual channels per input
- Supports one 4MP camera or eight 2MP camera streams
- Supports data rate up to 2.5 Gbps per lane (wire rate)
- Supports 1, 2, 3, or 4 Data Lane connections to MIPI D-PHY Receiver (DPHY_RX)
- Over 25 different programmable formats including YUV420, YUV422, RGB, Raw, and User Defined
- Supports four independent (simultaneous) output streams:
- Two VP 32-bit streams to VISS inputs of VPAC image processing accelerator
- One (up to 4 channels) PPI 16-bit pixel retransmission interface to Camera Streaming Interface Transmitter (CSI_TX_IF)
- One (up to 32 Channels) DMA interface through a 128-bit Packet Streaming Interface Link (PSI_L) connection to NAVSS for transfers to memory:
- Functional and data path error interrupts
- ECC support
- MIPI D-PHY Receiver (DPHY_RX) with the following main features:
- Allows the device to input video streams from external sensor cameras and other CSI2 compliant sources
- Compliant to MIPI D-PHY standard v1.2
- Supports up to 4 data and 1 clock lanes
- Supports up to 2.5 Gbps (with deskew) and 1.5 Gbps (without deskew) per data lane
- Clock lane Control / Interface logic type: CIL-SCNN for HS and low power receiving
- Data lane Control / Interface logic type: CIL-SFAN for HS and low power receiving
- Data lanes can be independently operated in HS or ULP mode
- Swapping of DP/DN signals within each clock/data pair
- Camera Streaming Interface Transmitter (CSI_TX_IF) with the following main features:
- Compliant to MIPI CSI-2 v1.3+, MIPI CSI-2 v2.0, and MIPI D-PHY v1.2
- Data rate up to 2.5 Gbps per lane (wire rate)
- Supports 1, 2, 3, or 4 Data Lane connections to MIPI D-PHY Transmitter (DPHY_TX)
- Over 25 different programmable formats including YUV420, YUV422, RGB, Raw, and User Defined
- Support of 16 virtual channels
- Support of four configurable input streams