SPRUIL1D May 2019 – December 2024 DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4VM , TDA4VM-Q1
For details on R5FSS vectored interrupt manager (VIM), see Section 6.3.3.6, R5FSS Vectored Interrupt Manager (VIM).
For details on DMSC nested vectored interrupt controller (NVIC), see TI Device Management Security Controller and Power Management Addendum, and Arm Cortex-M3 Technical Reference Manual.
For details on PRU-ICSSG local interrupt controller (INTC), see PRU_ICSSG Local INTC.