SPRUIN7C March 2020 – March 2024 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1
Three bits are used to encode the <Src> and <Dest> registers as shown in Table 12-14.
Bits | Register |
---|---|
000 | R0 |
001 | R1 |
010 | R2 |
011 | R3 |
100 | C0 |
101 | C1 |
110 | C2 |