The following sequence can be followed:
- Setup OSPI_CONFIG_REG register.
- Setup the indirect transfer's FLASH start address
in the OSPI_INDIRECT_READ_XFER_START_REG register.
- Setup the number of bytes to be transferred in
theOSPI_INDIRECT_READ_XFER_NUM_BYTES_REG register.
- Setup the indirect transfer's trigger address in
the OSPI_IND_AHB_ADDR_TRIGGER_REG register.
- Setup the indirect transfer's trigger address
range in the OSPI_INDIRECT_TRIGGER_ADDR_RANGE_REG register.
- If the watermark interrupt feature is to be used,
set the OSPI_INDIRECT_READ_XFER_WATERMARK_REG register which will cause an
interrupt to be generated when the fill level increases beyond the watermark
level. Setting the watermark can be useful indication to software when to
read the next part of the indirect read transfer. Note that if the watermark
is set to a value other than zero, the watermark interrupt will always
trigger once the final byte of indirect transfer has been fetched and placed
in the embedded SRAM, even if the watermark value is higher than the actual
completed fill level.
- Trigger Indirect Read access by setting the
OSPI_INDIRECT_READ_XFER_CTRL_REG[0] START_FLD bit to 1.
- If the watermark interrupt feature is to be used,
wait for watermark interrupt. Else poll the SRAM fill level via the
OSPI_SRAM_FILL_REG register to decide when sufficient data is in the SRAM to
trigger data fetches.
- Read the expected amount of data from SRAM. If there is still more data to fetch in order to complete the indirect read transfer, then loop back to step 8. Otherwise continue to step 10.
- The completion status of the Indirect Read
operation can be polled via the OSPI_INDIRECT_READ_XFER_CTRL_REG[5]
IND_OPS_DONE_STATUS_FLD bit.
- An Indirect Complete interrupt will be generated when the Indirect read operation has completed.