SPRUIW4 October 2021 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1
Pie channel mapping between F28002x and F28003x is different due to peripheral module changes between these devices. Table 3-6 summarizes the common and unique pie channel assignments on these two devices.
Color | Description |
---|---|
Pie channel common for both devices | |
Pie channel applicable only for F28002x | |
Pie channel applicable only for F28003x |
INTx.1 | INTx.2 | INTx.3 | INTx.4 | INTx.5 | INTx.6 | INTx.7 | INTx.8 | INTx.9 | INTx.10 | INTx.11 | INTx.12 | INTx.13 | INTx.14 | INTx.15 | INTx.16 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
INT1.y | ADCA1 | ADCB1 | ADCC1 | XINT1 | XINT2 | - | TIMER0 | WAKE/WDOG | - | SYS_ERR | - | - | - | - | - | - |
INT2.y | EPWM1_TZ | EPWM2_TZ | EPWM3_TZ | EPWM4_TZ | EPWM5_TZ | EPWM6_TZ | EPWM7_TZ | EPWM8_TZ | - | - | - | - | - | - | - | - |
INT3.y | EPWM1 | EPWM2 | EPWM3 | EPWM4 | EPWM5 | EPWM6 | EPWM7 | EPWM8 | - | - | - | - | - | - | - | - |
INT4.y | ECAP1 | ECAP2 | ECAP3 | - | - | - | - | - | - | - | ECAP3_INT2 | - | - | - | - | - |
INT5.y | EQEP1 | EQEP2 | - | - | CLB1 | CLB2 | CLB3 | CLB4 | SDFM1 | SDFM2 | - | - | SDFM1DR1 | SDFM1DR2 | SDFM1DR3 | SDFM1DR4 |
INT6.y | SPIA_RX | SPIA_TX | SPIB_RX | SPIB_TX | - | - | - | - | - | - | - | - | SDFM2DR1 | SDFM2DR2 | SDFM2DR3 | SDFM2DR4 |
INT7.y | DMA_CH1 | DMA_CH2 | DMA_CH3 | DMA_CH4 | DMA_CH5 | DMA_CH6 | - | - | - | - | FSITXA_INT1 | FSITXA_INT2 | FSIRXA_INT1 | FSIRXA_INT2 | DCC0 | |
INT8.y | I2CA | I2CA_FIFO | I2CB | I2CB_FIFO | - | - | - | - | LINA_0 | LINA_1 | LINB_0 | LINB_1 | PMBUSA | - | - | DCC1 |
INT9.y | SCIA_RX | SCIA_TX | SCIB_RX | SCIB_TX | CANA_0 | CANA_1 | - | - | MCAN_0 | MCAN_1 | MCAN_ECC | MCAN_WAKE | BGCRC_CPU | - | - | HICA |
INT10.y | ADCA_EVT | ADCA2 | ADCA3 | ADCA4 | ADCB_EVT | ADCB2 | ADCB3 | ADCB4 | ADCC_EVT | ADCC2 | ADCC3 | ADCC4 | - | - | - | - |
INT11.y | CLA1_1 | CLA1_2 | CLA1_3 | CLA1_4 | CLA1_5 | CLA1_6 | CLA1_7 | CLA1_8 | - | - | - | - | - | - | - | - |
INT12.y | XINT3 | XINT4 | XINT5 | PBIST(MPOST) | FMC | - | FPU_OVERFLOW | FPU_UNDERFLOW | - | RAM_CORR_ERR | FLASH_CORR_ERR | RAM_ACC_VIOL | AES_SINTREQ | BGCRC_CLA1 | CLA_OVERFLOW | CLA_UNDERFLOW |