SPRUIW4 October 2021 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1
Communication module changes between the F28002x and F28003x devices affect the number of modules, addition of CAN-FD and some differences in HIC and FSI. Details are available in Table 3-1.
Module | Category | F28002x | F28003x | Notes |
---|---|---|---|---|
LIN | Number | 2 - LINA, LINB | 2 - LINA, LINB | |
CAN | Number | 1- CANA | 1- CANA | |
CAN-FD | Number | not present | 1 - MCANA | |
SCI | Number | 1 - SCIA | 2 - SCIA, SCIB | |
SPI | Number | 2 - SPIA, SPIB | 2 - SPIA, SPIB | |
I2C | Number | 2 -I2CA, I2CB | 2 -I2CA, I2CB | |
PMBUS | Number | 1 - PMBUSA | 1 - PMBUSA | |
FSI | Number | 1 - FSIA | 1 - FSIA | |
Register | - | TX_OPER_CTRL_LO.SEL_TDM_IN | Transmit TDM Mode Enable bit | |
- | TX_DLYLINE_CTRL | Transmit delay line control register | ||
- | RX_MASTER_CTRL.DATA_FILTER_EN | Data filter enable bit | ||
- | RX_TRIG_CTRL_0 | Receive Trigger Control register 0 | ||
- | RX_TRIG_WIDTH_0 | Receive Trigger Wdith register 0 | ||
- | RX_TRIG_CTRL_1 | Receive Trigger Control register 1 | ||
- | RX_TRIG_CTRL_2 | Receive Trigger Control register 2 | ||
- | RX_TRIG_CTRL_3 | Receive Trigger Control register 3 | ||
- | RX_UDATA_FILTER | Receive User Data Filter Control register | ||
HIC | Number | 1 - HICA | 1 - HICA | |
Register | - | HICCOMMIT | Commit bit for the HICLOCK register |