SPRUIW9C October 2021 – March 2024 TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1
Since the initiator port uses 16-bit aligned addressing while the host port can operate in 8 and 16-bit modes, address translation is needed for correct operation. Table 14-6 shows an example of address translation performed in 8-bit data width mode while Table 14-7 shows the same for 16-bit data width mode.
HICMODECR. DW_MODE |
Host Port Address | Initiator Port
Address {HICDBADDR.BASE_ADDR[31:7],A[6:1]} |
---|---|---|
8-bit ("0") | 0x0 | 0x0 |
0x1 | 0x0 | |
0x2 | 0x1 | |
0x3 | 0x1 | |
0x4 | 0x2 | |
0x5 | 0x2 | |
0x6 | 0x3 | |
0x7 | 0x3 | |
0x7F | 0x3F | |
0x80 | 0x40 | |
0x81 | 0x40 | |
0xFE | 0x7F | |
0xFF | 0x7F |
HICMODECR. DW_MODE |
Host Port Address | Initiator Port Address{HICDBADDR.BASE_ADDR[31 :8],A[7:0]} |
---|---|---|
16-bit ("1") | 0x0 | 0x0 |
0x1 | 0x1 | |
0x2 | 0x2 | |
0x7F | 0x7F | |
0x80 | 0x80 | |
0x81 | 0x81 | |
0xFE | 0xFE | |
0xFF | 0xFF |