SPRUIW9C October 2021 – March 2024 TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1
STANDBY is a more aggressive low-power mode that gates both the CPU clock and any peripheral clocks derived from the CPU SYSCLK. The watchdog however, is left active. STANDBY is best suited for an application where the wake-up signal comes from an external system (or CPU subsystem) rather than a peripheral input.
An NMI (or optionally) a watchdog interrupt or a configured GPIO can wake the CPU from STANDBY mode. Each GPIO from GPIO0-60 can be configured to wake the CPU when the GPIO are driven active low. Upon wakeup, the CPU receives the WAKEINT interrupt if configured.
To enter STANDBY mode:
To wake up from STANDBY mode:
At the end of the qualification period, the PLL enables the CLKIN to the CPU and the WAKEINT interrupt is latched in the PIE block.
The CPU is now out of STANDBY mode and can resume normal execution.