SPRUIW9C October 2021 – March 2024 TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1
The Flash bank and pump consume a significant amount of power when active. The Flash module provides a mechanism to power-down Flash banks and pump. Special timers automatically sequence the power-up of the CPU Flash bank. The charge pump module includes an independent power-up timer as well.
The Flash bank and OTP memory operate in three power modes: Sleep (lowest power), Standby, and Active (highest power)
The charge pump operates in two power modes:
Any access to any Flash bank/OTP causes the charge pump to go into active mode, if in sleep mode. An erase or program command causes the charge pump and bank to become active. If any bank is in active or in standby mode, the charge pump is in active mode, independent of the pump power mode control configuration (PMPPWR bit field in the FPAC1 register). While the pump is in sleep state, a charge pump sleep down counter holds a user-configurable value (PSLEEP bit field in the FPAC1 register) and when the charge pump exits sleep power mode, the down counter delays from 0 to PSLEEP prescaled SYSCLK clock cycles (prescaled clock is SYSCLK/2) before putting the charge pump into active power mode.
Following are the numbers of cycles for the bank and pump to wake up from low-power modes.
Where: Flash clock = SYSCLK/(RWAIT+1)