SPRUIZ1B July 2023 – August 2024 TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1
Section 11.2.2 describes the external prioritization and arbitration among requests from different sources within the microcontroller. The result of this external arbitration is that only one request is presented to the EMIF at a time. Once the EMIF completes a request, the external arbiter then provides the EMIF with the next pending request.
Internally, the EMIF undertakes memory device transactions according to a strict priority scheme. The highest priority events are:
Either of these events causes the EMIF to immediately commence the initialization sequence as described in Section 11.2.5.4.
Once the EMIF has completed its initialization sequence, the EMIF performs memory transactions according to the following priority scheme (highest priority listed first):
After taking one of the actions listed above, the EMIF then returns to the top of the priority list to determine the next action.
Because the EMIF does not issue auto-refresh cycles when in the self-refresh state, the above priority scheme does not apply when in this state. See Section 11.2.5.7 for details on the operation of the EMIF when in the self-refresh state.