SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Test Register. Test mode selection. Write access to the MCAN_TEST register has to be enabled by setting the MCAN_CCCR[7] TEST bit.
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Instance Name | Physical Address |
---|---|
MCAN0 | 5260 8210h |
MCAN1 | 5261 8210h |
MCAN2 | 5262 8210h |
MCAN3 | 5263 8210h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
NU15 | |||||||
R | |||||||
0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
NU15 | |||||||
R | |||||||
0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
NU15 | |||||||
R | |||||||
0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RX | TX | LBCK | NU14 | ||||
R | R/W | R/W | R | ||||
0h | 0h | 0h | 0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31:8 | NU15 | R | 0h | Reserved |
7 | RX | R | 0h | Receive Pin Monitors the actual value of the MCAN RX pin 1'b0 = The CAN bus is dominant 1'b1 = The CAN bus is recessive |
6:5 | TX | R/W | 0h | Control of Transmit Pin 2'b00 = Reset value, the MCAN TX pin controlled by the CAN Core, updated at the end of the CAN bit time 2'b01 = Sample Point can be monitored at the MCAN TX pin 2'b10 = Dominant ('0') level at the MCAN TX pin 2'b11 = Recessive ('1') at the MCAN TX pin |
4 | LBCK | R/W | 0h | Loop Back Mode 1'b0 = Reset value, Loopback Mode is disabled 1'b1 = Loopback Mode is enabled(see Test Modes) |
3:0 | NU14 | R | 0h | Reserved |