SPRUJ42 User guide

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

5.12.2.31 CFG_PSR Register

12.2.31.1 CFG_PSR Register (Offset = 244h) [reset = 707h]

Protocol Status Register. CAN protocol controller status, transmitter delay compensation value.

Table 5-1434 Instance Table

Instance Name	Physical Address
MCAN0	5260 8244h
MCAN1	5261 8244h
MCAN2	5262 8244h
MCAN3	5263 8244h

Figure 5-707 CFG_PSR Name Register

31	30	29	28	27	26	25	24
NU27
R
0h
23	22	21	20	19	18	17	16
NU27	TDCV
R	R
0h	0h
15	14	13	12	11	10	9	8
NU26	PXE	RFDF	RBRS	RESI	DLEC
R	R	R	R	R	R
0h	0h	0h	0h	0h	7h
7	6	5	4	3	2	1	0
BO	EW	EP	ACT		LEC
R	R	R	R		R
0h	0h	0h	0h		7h

Table 5-1435 CFG_PSR Register Field Descriptions

Bit	Field	Type	Reset	Description
31:23	NU27	R	0h	Reserved
22:16	TDCV	R	0h	Transmitter Delay Compensation Value Position of the secondary sample point, defined by the sum of the measured delay from the MCAN TX to MCAN RX pins and the MCAN_TDCR[14-8] TDCO field. The SSP position is, in the data phase, the number of mtq between the start of the transmitted bit and the secondary sample point. Valid values are 0 to 127 mtq.
15	NU26	R	0h	Reserved
14	PXE	R	0h	Protocol Exception Event 1'b0 = No protocol exception event occurred since last read access 1'b1 = Protocol exception event occurred
13	RFDF	R	0h	Recieved a CAN FD Message This bit is set independent of acceptance filtering. 1'b0 = Since this bit was reset by the Host CPU, no CAN FD message has been received 1'b1 = Message in CAN FD format with FDF flag set has been received
12	RBRS	R	0h	BRS flag of last recieved CAN FD Message This bit is set together with the MCAN_PSR[13] RFDF bit, independent of acceptance filtering. 1'b0 = Last received CAN FD message did not have its BRS flag set 1'b1 = Last received CAN FD message had its BRS flag set
11	RESI	R	0h	ESI flag of last recieved CAN FD Message This bit is set together with the MCAN_PSR[13] RFDF bit, independent of acceptance filtering. 1'b0 = Last received CAN FD message did not have its ESI flag set 1'b1 = Last received CAN FD message had its ESI flag set
10:8	DLEC	R	7h	Data Phase Last Error Code Type of last error that occurred in the data phase of a CAN FD format frame with its BRS flag set. Coding is the same as for the MCAN_PSR[2-0] LEC field. This field will be cleared to zero when a CAN FD format frame with its BRS flag set has been transferred (reception or transmission) without error.
7	BO	R	0h	Bus_Off status 1'b0 = The MCAN module is not Bus_Off 1'b1 = The MCAN module is in Bus_Off state
6	EW	R	0h	Warning Status 1'b0 = Both error counters are below the Error_Warning limit of 96 1'b1 = At least one of error counter has reached the Error_Warning limit of 96
5	EP	R	0h	Error Passive 1'b0 = The MCAN module is in the Error_Active state. It normally takes part in bus communication and sends an active error flag when an error has been detected 1'b1 = The MCAN module is in the Error_Passive state
4:3	ACT	R	0h	Activity Monitors the module's CAN communication state. 2'b00 = Synchronizing - node is synchronizing on CAN communication 2'b01 = Idle - node is neither receiver nor transmitter 2'b10 = Receiver - node is operating as receiver 2'b11 = Transmitter - node is operating as transmitter Note: ACT is set to 0 by a Protocol Exception Event.
2:0	LEC	R	7h	Last Error Code The MCAN_PSR[2-0] LEC field indicates the type of the last error to occur on the CAN bus. This field will be cleared to 0hwhen a message has been transferred (reception or transmission) without error. 3'b000 = No Error: No error occurred since the MCAN_PSR[2-0] LEC field has been reset by successful reception or transmission. 3'b001 = Stuff Error: More than 5 equal bits in a sequence have occurred in a part of a received message where this is not allowed. 3'b010 = Form Error: A fixed format part of a received frame has the wrong format. 3'b011 = AckError: The message transmitted by the MCAN module was not acknowledged by another node. 3'b100 = Bit1Error: During the transmission of a message (with the exception of the arbitration field), the device wanted to send a recessive level (bit of logical value '1'), but the monitored bus value was dominant. 3'b101 = Bit0Error: During the transmission of a message (or acknowledge bit, or active error flag, or overload flag), the device wanted to send a dominant level (data or identifier bit logical value 0), but the monitored bus value was recessive. During Bus_Off recovery this status is set each time a sequence of 11 recessive bits has been monitored. This enables the Host CPU to monitor the proceeding of the Bus_Off recovery sequence (indicating the bus is not stuck at dominant or continuously disturbed). 3'b110 = CRCError: The CRC check sum of a received message was incorrect. The CRC of an incom-ing message does not match with the CRC calculated from the received data. 3'b111 = NoChange: Any read access to the Protocol Status Register re-initializes the MCAN_PSR[2-0] LEC field to 3'b111. When the MCAN_PSR[2-0] LEC field shows the value 3'b111, no CAN bus event was detected since the last Host CPU read access to the Protocol Status Register. Note: When a frame in CAN FD format has reached the data phase with BRS flag set, the next CAN event (error or valid frame) will be shown in the MCAN_PSR[10-8] DLEC field instead of the MCAN_PSR[2-0] LEC field. An error in a fixed stuff bit of a CAN FD CRC sequence will be shown as a Form Error, not Stuff Error.