SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Tx Buffer Cancellation Request register. Request cancellation of pending transmissions. Each Tx Buffer has its own Cancellation Request bit. Writing a 1h will set the corresponding Cancellation Request bit; writing a 0h has no impact. This enables the Host CPU to set cancellation requests for multiple Tx Buffers with one write to the MCAN_TXBCR register. The MCAN_TXBCR bits are set only for those Tx Buffers configured via the MCAN_TXBC register. The bits remain set until the corresponding bit of the MCAN_TXBRP register is reset.
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Instance Name | Physical Address |
---|---|
MCAN0 | 5260 82D4h |
MCAN1 | 5261 82D4h |
MCAN2 | 5262 82D4h |
MCAN3 | 5263 82D4h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
CR | |||||||
R/W0TC | |||||||
0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
CR | |||||||
R/W0TC | |||||||
0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
CR | |||||||
R/W0TC | |||||||
0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CR | |||||||
R/W0TC | |||||||
0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31:0 | CR | R/W0TC | 0h | Cancellation Request |