SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
ECC Control Register.
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Instance Name | Physical Address |
---|---|
MCAN0 | 5270 0014h |
MCAN1 | 5270 1014h |
MCAN2 | 5270 2014h |
MCAN3 | 5270 3014h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
NU3 | |||||||
R | |||||||
0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
NU3 | |||||||
R | |||||||
0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
NU3 | CHECK | ||||||
R | R/W | ||||||
0h | 1h | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ERROR_ONCE | FORCE_N_ROW | FORCE_DED | FORCE_SEC | EN_RMW | ECC_CHK | ECC_EN |
NONE | W | W | W | W | W | W | W |
0h | 0h | 0h | 0h | 0h | 1h | 1h | 1h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31:9 | NU3 | R | 0h | TI Internal : Reserved |
8 | CHECK | R/W | 1h | TI Internal : Check Parity TI Internal : Check timeout |
7 | RESERVED | NONE | 0h | Reserved |
6 | ERROR_ONCE | W | 0h | TI Internal : Force Error only once |
5 | FORCE_N_ROW | W | 0h | TI Internal : Force Error on any RAM read |
4 | FORCE_DED | W | 0h | TI Internal : Force Double Bit Error |
3 | FORCE_SEC | W | 0h | TI Internal : Force Single Bit Error |
2 | EN_RMW | W | 1h | TI Internal : Enable rmw |
1 | ECC_CHK | W | 1h | TI Internal : Enable ECC check |
0 | ECC_EN | W | 1h | TI Internal : Enable ECC |