SPRUJ42 User guide

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

4.2.157.1 TPTC_DFMPPRXY0 Register (Offset = 314h) [reset = 0h]

Dst FIFO Set Mem Protect Proxy.

Table 4-1704 Instance Table

Instance Name	Physical Address
EDMA0	52A6 0314h
EDMA1	52A4 0314h

Figure 4-834 TPTC_DFMPPRXY0 Name Register

Table 4-1705 TPTC_DFMPPRXY0 Register Field Descriptions

Bit	Field	Type	Reset	Description
31:10	RESERVED	NONE	0h	Reserved
9	SECURE	R	0h	Secure Level: Deprecated, always read as 0.
8	PRIV	R	0h	Privilege Level: PRIV = 0 : User level privilege PRIV = 1 : Supervisor level privilege PMPPRXY.PRIV is always updated with the value from the configuration bus privilege field on any/every write to Program Set BIDX Register [trigger register]. The PRIV value for the SA Set and DF Set are copied from the value in the Program set along with the remainder of the parameter values.The privilege ID is issued on the VBusM read and write command bus such that the target endpoints can perform memory protection checks based on the PRIV of the external host that sets up the DMA transaction.
7:4	RESERVED	NONE	0h	Reserved
3:0	PRIVID	R	0h	Privilege ID: PMPPRXY.PRIVID is always updated with the value from configuration bus privilege ID field on any/every write to Program Set BIDX Register [trigger register]. The PRIVID value for the SA Set and DF Set are copied from the value in the Program set along with the remainder of the parameter values.The privilege ID is issued on the VBusM read and write command bus such that the target endpoints can perform memory protection checks based on the privid of the external host that sets up the DMA transaction.