SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Receive event and error flag force register.
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Instance Name | Physical Address |
---|---|
FSI_RX0 | 5029 001Ah |
FSI_RX1 | 5029 101Ah |
FSI_RX2 | 502B 001Ah |
FSI_RX3 | 502B 101Ah |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED_1 | ERROR_TAG_MATCH | DATA_TAG_MATCH | PING_TAG_MATCH | DATA_FRAME | FRAME_OVERRUN | PING_FRAME | ERR_FRAME |
R | W | W | W | W | W | W | W |
0h | 0h | 0h | 0h | 0h | 0h | 0h | 0h |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
BUF_UNDERRUN | FRAME_DONE | BUF_OVERRUN | EOF_ERR | TYPE_ERR | CRC_ERR | FRAME_WD_TO | PING_WD_TO |
W | W | W | W | W | W | W | W |
0h | 0h | 0h | 0h | 0h | 0h | 0h | 0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15 | RESERVED_1 | R | 0h | Reserved |
14 | ERROR_TAG_MATCH | W | 0h | Error Tag Match Flag Force bit This bit will cause the corresponding bit in the RX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding bit in the RX_EVT_STS Register. |
13 | DATA_TAG_MATCH | W | 0h | Data Tag Match Flag Force bit This bit will cause the corresponding bit in the RX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding bit in the RX_EVT_STS Register. |
12 | PING_TAG_MATCH | W | 0h | Ping Tag Match Flag Force bit This bit will cause the corresponding bit in the RX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding bit in the RX_EVT_STS Register. |
11 | DATA_FRAME | W | 0h | Data Frame Received Flag Force bit This bit will cause the corresponding bit in the RX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding bit in the RX_EVT_STS Register. |
10 | FRAME_OVERRUN | W | 0h | Frame Overrun Flag Force bit This bit will cause the corresponding bit in the RX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding bit in the RX_EVT_STS Register. |
9 | PING_FRAME | W | 0h | Ping Frame Received Flag Force bit This bit will cause the corresponding bit in the RX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding bit in the RX_EVT_STS Register. |
8 | ERR_FRAME | W | 0h | Error Frame Received Flag Force bit This bit will cause the corresponding bit in the RX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding bit in the RX_EVT_STS Register. |
7 | BUF_UNDERRUN | W | 0h | Receive Buffer Underrun Flag Force bit This bit will cause the corresponding bit in the RX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding bit in the RX_EVT_STS Register. |
6 | FRAME_DONE | W | 0h | Frame Done Flag Force bit This bit will cause the corresponding bit in the RX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding bit in the RX_EVT_STS Register. |
5 | BUF_OVERRUN | W | 0h | Receive Buffer Overrun Flag Force bit This bit will cause the corresponding bit in the RX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding bit in the RX_EVT_STS Register. |
4 | EOF_ERR | W | 0h | End-of-Frame Error Flag Force bit This bit will cause the corresponding bit in the RX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding bit in the RX_EVT_STS Register. |
3 | TYPE_ERR | W | 0h | Frame Type Error Flag Force bit This bit will cause the corresponding bit in the RX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding bit in the RX_EVT_STS Register. |
2 | CRC_ERR | W | 0h | CRC Error Flag Force bit This bit will cause the corresponding bit in the RX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding bit in the RX_EVT_STS Register. |
1 | FRAME_WD_TO | W | 0h | Frame Watchdog Timeout Flag Force bit This bit will cause the corresponding bit in the RX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding bit in the RX_EVT_STS Register. |
0 | PING_WD_TO | W | 0h | Ping Watchdog Timeout Flag Force bit This bit will cause the corresponding bit in the RX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding bit in the RX_EVT_STS Register. |