SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Current Interval count register.
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Instance Name | Physical Address |
---|---|
R5SS0 | 5350 0010h |
R5SS1 | 5351 0010h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
CORE2_ICOUNT | |||||||
R | |||||||
0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
CORE2_ICOUNT | |||||||
R | |||||||
0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
CORE1_ICOUNT | |||||||
R | |||||||
0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CORE1_ICOUNT | |||||||
R | |||||||
0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31:16 | CORE2_ICOUNT | R | 0h | Specifies the last interval number for CORE2 This specifies the Last executed Interval number for CORE2 of Segment0 if self test is being executed for secondary core as well. This field is applicable only for Segment 0. |
15:0 | CORE1_ICOUNT | R | 0h | Specifies the last interval number for CORE1 This specifies the Last executed Interval number of a self-test run. |