SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
MDIO Poll Register
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Instance Name | Physical Address |
---|---|
CPSW0 | 5280 0F34h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
MANUALMODE | STATECHANGEMODE | RESERVED | |||||
R/W | R/W | NONE | |||||
0h | 0h | 0h | |||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
NONE | |||||||
0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
NONE | |||||||
0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
IPG | |||||||
R/W | |||||||
0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31 | MANUALMODE | R/W | 0h | Polling Inter Packet Gap Value - This value is the number of MDCLK_O clocks between each poll when polling is enabled. |
30 | STATECHANGEMODE | R/W | 0h | State Change Mode - When set, the MDIO is operating in State Change Mode. When clear, the MDIO is operating in normal mode. State change mode effects interrupt operations. |
29:8 | RESERVED | NONE | 0h | Reserved |
7:0 | IPG | R/W | 0h | Manual Mode - When set, the MDIO pins are directly controlled by software through the bits in the MDIOManual_IF register |