SPRUJ42 User guide

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

2.2.335.1 ICSSM_PR1_ICSS_ECAP0_ECAP_SLV_ECCLR Register (Offset = 30h) [reset = 0h]

ECAP INTERRUPT CLEAR REGISTER.

Table 4-1091 Instance Table

Instance Name	Physical Address
ICSSM0	4803 0030h

Figure 4-529 ICSSM_PR1_ICSS_ECAP0_ECAP_SLV_ECCLR Name Register

Table 4-1092 ICSSM_PR1_ICSS_ECAP0_ECAP_SLV_ECCLR Register Field Descriptions

Bit	Field	Type	Reset	Description
31:16	RESERVED	NONE	0h	Reserved
15:8	_RESV0	R	0h
7	CMPEQ	R/W	0h	COMPARE EQUAL STATUS FLAG: WRITING A 1 WILL CLEAR THE CMPEQ FLAG CONDITIONWRITING A 0 WILL HAVE NO EFFECTALWAYS READS BACK A 0
6	PRDEQ	R/W	0h	PERIOD EQUAL STATUS FLAG: WRITING A 1 WILL CLEAR THE PRDEQ FLAG CONDITIONWRITING A 0 WILL HAVE NO EFFECTALWAYS READS BACK A 0
5	CNTOVF	R/W	0h	COUNTER OVERFLOW STATUS FLAG: WRITING A 1 WILL CLEAR THE CNTOVF FLAG CONDITIONWRITING A 0 WILL HAVE NO EFFECTALWAYS READS BACK A 0
4	CEVT4	R/W	0h	CAPTURE EVENT 4 STATUS FLAG: WRITING A 1 WILL CLEAR THE CEVT3 FLAG CONDITIONWRITING A 0 WILL HAVE NO EFFECTALWAYS READS BACK A 0
3	CEVT3	R/W	0h	CAPTURE EVENT 3 STATUS FLAG: WRITING A 1 WILL CLEAR THE CEVT3 FLAG CONDITIONWRITING A 0 WILL HAVE NO EFFECTALWAYS READS BACK A 0
2	CEVT2	R/W	0h	CAPTURE EVENT 2 STATUS FLAG: WRITING A 1 WILL CLEAR THE CEVT2 FLAG CONDITIONWRITING A 0 WILL HAVE NO EFFECTALWAYS READS BACK A 0
1	CEVT1	R/W	0h	CAPTURE EVENT 1 STATUS FLAG: WRITING A 1 WILL CLEAR THE CEVT1 FLAG CONDITIONWRITING A 0 WILL HAVE NO EFFECTALWAYS READS BACK A 0
0	INT	R/W	0h	GLOBAL INTERRUPT CLEAR FLAG: WRITING A 1 WILL CLEAR THE INT FLAG AND ENABLE FURTHER INTERRUPTS TO BE GENERATED IF ANY OF THE EVENT FLAGS ARE SET TO 1WRITING A 0 WILL HAVE NO EFFECTALWAYS READS BACK A 0