SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
MCR[3:0] controls the interface with the modem, data set or peripheral device that is emulating the modem.
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Instance Name | Physical Address |
---|---|
UART0 | 5230 0010h |
UART1 | 5230 1010h |
UART2 | 5230 2010h |
UART3 | 5230 3010h |
UART4 | 5230 4010h |
UART5 | 5230 5010h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED_24 | |||||||
R | |||||||
0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED_24 | |||||||
R | |||||||
0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED_24 | |||||||
R | |||||||
0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | TCR_TLR | XON_EN | LOOPBACK_EN | CD_STS_CH | RI_STS_CH | RTS | DTR |
R | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
0h | 0h | 0h | 0h | 0h | 0h | 0h | 0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31:8 | RESERVED_24 | R | 0h | |
7 | RESERVED | R | 0h | |
6 | TCR_TLR | R/W | 0h | 1 Enables access to the TCR and TLR registers. 0 No action |
5 | XON_EN | R/W | 0h | 1 Enable 'XON any' function 0 Disable 'XON any' function |
4 | LOOPBACK_EN | R/W | 0h | 1 Enable local loopback mode (internal). In this mode the MCR[3:0] signals are looped back into MSR[7:4]. The transmit output is looped back to the receive input internally 0 Normal operating mode |
3 | CD_STS_CH | R/W | 0h | 1 In loopback forces DCD* input low and IRQ outputs to inactive state. 0 In loopback forces DCD* input high and IRQ outputs to inactive state. |
2 | RI_STS_CH | R/W | 0h | 1 In loopback forces RI* input low. 0 In loopback forces RI* input high. |
1 | RTS | R/W | 0h | In loop back controls MSR[4]. If auto-RTS is enabled the RTS* output is controlled by hardware flow control. 1 Force RTS* output to active (low). 0 Force RTS* output to inactive (high). |
0 | DTR | R/W | 0h | 1 Force DTR* output to active (low). 0 Force DTR* output to inactive (high). |