SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
The mode of operation can be programmed by writing to MDR1[2:0] and therefore the MDR1 must be programmed on start-up after configuration of the configuration registers (DLL, DLH, LCR). The value of MDR1[2:0] must not be changed again during normal operation.
Note: If the module is disabled by setting the MODE_SELECT field to 111, interrupt requests can still be generated unless disabled through the interrupt enable register (UART_IER). In this case, UART mode interrupts are visible. Reading the interrupt identification register (UART_IIR) shows UART mode interrupt flags.
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Instance Name | Physical Address |
---|---|
UART0 | 5230 0020h |
UART1 | 5230 1020h |
UART2 | 5230 2020h |
UART3 | 5230 3020h |
UART4 | 5230 4020h |
UART5 | 5230 5020h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED_24 | |||||||
R | |||||||
0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED_24 | |||||||
R | |||||||
0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED_24 | |||||||
R | |||||||
0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
FRAME_END_MODE | SIP_MODE | SCT | SET_TXIR | IR_SLEEP | MODE_SELECT | ||
R/W | R/W | R/W | R/W | R/W | R/W | ||
0h | 0h | 0h | 0h | 0h | 7h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31:8 | RESERVED_24 | R | 0h | |
7 | FRAME_END_MODE | R/W | 0h | IrDA mode only. 1 Set EOT bit method 0 Frame-length method |
6 | SIP_MODE | R/W | 0h | MIR/FIR modes only. 1 Automatic SIP mode: SIP is generated after each transmission. 0 Manual SIP mode: SIP is generated with the control of ACREG[3] |
5 | SCT | R/W | 0h | Store and control the transmission 1 Starts the Infrared transmission with the control of ACREG[2]. Note: before starting any transmission, there must be no reception on going. 0 Starts the Infrared transmission as soon as a value is written to THR |
4 | SET_TXIR | R/W | 0h | Used to configure the infrared transceiver. 1 TXIR pin output is forced high (not dependant of MDR2[7] value). 0 No action if MDR2[7]=0. TXIR pin output is forced low if MDR2[7]=1 |
3 | IR_SLEEP | R/W | 0h | 1 IrDA/CIR sleep mode enabled 0 IrDA/CIR sleep mode disabled |
2:0 | MODE_SELECT | R/W | 7h | 7 Disable (default state) 6 CIR mode 5 FIR mode 4 MIR mode 3 UART 13x mode 2 UART 16x auto-baud 1 SIR mode 0 UART 16x mode |