SPRUJ42 User guide

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

3.4.2.1 CMPSSB_COMPCTL Register

4.2.1.1 CMPSSB_COMPCTL Register (Offset = 0h) [reset = 0h]

CMPSS Comparator Control Register.

Table 3-393 Instance Table

Instance Name	Physical Address
CMPSSB0	5022 0000h
CMPSSB1	5022 1000h
CMPSSB2	5022 2000h
CMPSSB3	5022 3000h
CMPSSB4	5022 4000h
CMPSSB5	5022 5000h
CMPSSB6	5022 6000h
CMPSSB7	5022 7000h
CMPSSB8	5022 8000h
CMPSSB9	5022 9000h

Figure 3-191 CMPSSB_COMPCTL Name Register

15	14	13	12	11	10	9	8
COMPDACE	ASYNCLEN	CTRIPOUTLSEL		CTRIPLSEL		COMPLINV	RESERVED_3
R/W	R/W	R/W		R/W		R/W	R/W
0h	0h	0h		0h		0h	0h
7	6	5	4	3	2	1	0
RESERVED_2	ASYNCHEN	CTRIPOUTHSEL		CTRIPHSEL		COMPHINV	RESERVED_1
R	R/W	R/W		R/W		R/W	R/W
0h	0h	0h		0h		0h	0h

Table 3-394 CMPSSB_COMPCTL Register Field Descriptions

Bit	Field	Type	Reset	Description
15	COMPDACE	R/W	0h	Comparator/DAC enable. 0 Comparator/DAC disabled 1 Comparator/DAC enabled
14	ASYNCLEN	R/W	0h	Low comparator asynchronous path enable. Allows asynchronous comparator output to feed into OR gate with latched digital filter signal when CTRIPLSEL=3 or CTRIPOUTLSEL=3. 0 Asynchronous comparator output does not feed into OR gate with latched digital filter output 1 Asynchronous comparator output feeds into OR gate with latched digital filter output
13:12	CTRIPOUTLSEL	R/W	0h	Low comparator CTRIPOUTL source select. 0 Asynchronous comparator output drives CTRIPOUTL 1 Synchronous comparator output drives CTRIPOUTL 2 Output of digital filter drives CTRIPOUTL 3 Latched output of digital filter drives CTRIPOUTL
11:10	CTRIPLSEL	R/W	0h	Low comparator CTRIPL source select. 0 Asynchronous comparator output drives CTRIPL 1 Synchronous comparator output drives CTRIPL 2 Output of digital filter drives CTRIPL 3 Latched output of digital filter drives CTRIPL
9	COMPLINV	R/W	0h	Low comparator output invert. 0 Output of comparator is not inverted 1 Output of comparator is inverted
8	RESERVED_3	R/W	0h	Reserved for CMPSSB
7	RESERVED_2	R	0h	Reserved
6	ASYNCHEN	R/W	0h	High comparator asynchronous path enable. Allows asynchronous comparator output to feed into OR gate with latched digital filter signal when CTRIPHSEL=3 or CTRIPOUTHSEL=3. 0 Asynchronous comparator output does not feed into OR gate with latched digital filter output 1 Asynchronous comparator output feeds into OR gate with latched digital filter output
5:4	CTRIPOUTHSEL	R/W	0h	High comparator CTRIPOUTH source select. 0 Asynchronous comparator output drives CTRIPOUTH 1 Synchronous comparator output drives CTRIPOUTH 2 Output of digital filter drives CTRIPOUTH 3 Latched output of digital filter drives CTRIPOUTH
3:2	CTRIPHSEL	R/W	0h	High comparator CTRIPH source select. 0 Asynchronous comparator output drives CTRIPH 1 Synchronous comparator output drives CTRIPH 2 Output of digital filter drives CTRIPH 3 Latched output of digital filter drives CTRIPH
1	COMPHINV	R/W	0h	High comparator output invert. 0 Output of comparator is not inverted 1 Output of comparator is inverted
0	RESERVED_1	R/W	0h	Reserved for CMPSSB