SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Action Qualifier Control Register.
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Instance Name | Physical Address |
---|---|
EPWM0_G0 | 5000 0020h |
EPWM0_G1 | 5004 0020h |
EPWM0_G2 | 5008 0020h |
EPWM0_G3 | 500C 0020h |
EPWM1_G0 | 5000 1020h |
EPWM1_G1 | 5004 1020h |
EPWM1_G2 | 5008 1020h |
EPWM1_G3 | 500C 1020h |
EPWM2_G0 | 5000 2020h |
EPWM2_G1 | 5004 2020h |
EPWM2_G2 | 5008 2020h |
EPWM2_G3 | 500C 2020h |
EPWM3_G0 | 5000 3020h |
EPWM3_G1 | 5004 3020h |
EPWM3_G2 | 5008 3020h |
EPWM3_G3 | 500C 3020h |
EPWM4_G0 | 5000 4020h |
EPWM4_G1 | 5004 4020h |
EPWM4_G2 | 5008 4020h |
EPWM4_G3 | 500C 4020h |
EPWM5_G0 | 5000 5020h |
EPWM5_G1 | 5004 5020h |
EPWM5_G2 | 5008 5020h |
EPWM5_G3 | 500C 5020h |
EPWM6_G0 | 5000 6020h |
EPWM6_G1 | 5004 6020h |
EPWM6_G2 | 5008 6020h |
EPWM6_G3 | 500C 6020h |
EPWM7_G0 | 5000 7020h |
EPWM7_G1 | 5004 7020h |
EPWM7_G2 | 5008 7020h |
EPWM7_G3 | 500C 7020h |
EPWM8_G0 | 5000 8020h |
EPWM8_G1 | 5004 8020h |
EPWM8_G2 | 5008 8020h |
EPWM8_G3 | 500C 8020h |
EPWM9_G0 | 5000 9020h |
EPWM9_G1 | 5004 9020h |
EPWM9_G2 | 5008 9020h |
EPWM9_G3 | 500C 9020h |
EPWM10_G0 | 5000 A020h |
EPWM10_G1 | 5004 A020h |
EPWM10_G2 | 5008 A020h |
EPWM10_G3 | 500C A020h |
EPWM11_G0 | 5000 B020h |
EPWM11_G1 | 5004 B020h |
EPWM11_G2 | 5008 B020h |
EPWM11_G3 | 500C B020h |
EPWM12_G0 | 5000 C020h |
EPWM12_G1 | 5004 C020h |
EPWM12_G2 | 5008 C020h |
EPWM12_G3 | 500C C020h |
EPWM13_G0 | 5000 D020h |
EPWM13_G1 | 5004 D020h |
EPWM13_G2 | 5008 D020h |
EPWM13_G3 | 500C D020h |
EPWM14_G0 | 5000 E020h |
EPWM14_G1 | 5004 E020h |
EPWM14_G2 | 5008 E020h |
EPWM14_G3 | 500C E020h |
EPWM15_G0 | 5000 F020h |
EPWM15_G1 | 5004 F020h |
EPWM15_G2 | 5008 F020h |
EPWM15_G3 | 500C F020h |
EPWM16_G0 | 5001 0020h |
EPWM16_G1 | 5005 0020h |
EPWM16_G2 | 5009 0020h |
EPWM16_G3 | 500D 0020h |
EPWM17_G0 | 5001 1020h |
EPWM17_G1 | 5005 1020h |
EPWM17_G2 | 5009 1020h |
EPWM17_G3 | 500D 1020h |
EPWM18_G0 | 5001 2020h |
EPWM18_G1 | 5005 2020h |
EPWM18_G2 | 5009 2020h |
EPWM18_G3 | 500D 2020h |
EPWM19_G0 | 5001 3020h |
EPWM19_G1 | 5005 3020h |
EPWM19_G2 | 5009 3020h |
EPWM19_G3 | 500D 3020h |
EPWM20_G0 | 5001 4020h |
EPWM20_G1 | 5005 4020h |
EPWM20_G2 | 5009 4020h |
EPWM20_G3 | 500D 4020h |
EPWM21_G0 | 5001 5020h |
EPWM21_G1 | 5005 5020h |
EPWM21_G2 | 5009 5020h |
EPWM21_G3 | 500D 5020h |
EPWM22_G0 | 5001 6020h |
EPWM22_G1 | 5005 6020h |
EPWM22_G2 | 5009 6020h |
EPWM22_G3 | 500D 6020h |
EPWM23_G0 | 5001 7020h |
EPWM23_G1 | 5005 7020h |
EPWM23_G2 | 5009 7020h |
EPWM23_G3 | 500D 7020h |
EPWM24_G0 | 5001 8020h |
EPWM24_G1 | 5005 8020h |
EPWM24_G2 | 5009 8020h |
EPWM24_G3 | 500D 8020h |
EPWM25_G0 | 5001 9020h |
EPWM25_G1 | 5005 9020h |
EPWM25_G2 | 5009 9020h |
EPWM25_G3 | 500D 9020h |
EPWM26_G0 | 5001 A020h |
EPWM26_G1 | 5005 A020h |
EPWM26_G2 | 5009 A020h |
EPWM26_G3 | 500D A020h |
EPWM27_G0 | 5001 B020h |
EPWM27_G1 | 5005 B020h |
EPWM27_G2 | 5009 B020h |
EPWM27_G3 | 500D B020h |
EPWM28_G0 | 5001 C020h |
EPWM28_G1 | 5005 C020h |
EPWM28_G2 | 5009 C020h |
EPWM28_G3 | 500D C020h |
EPWM29_G0 | 5001 D020h |
EPWM29_G1 | 5005 D020h |
EPWM29_G2 | 5009 D020h |
EPWM29_G3 | 500D D020h |
EPWM30_G0 | 5001 E020h |
EPWM30_G1 | 5005 E020h |
EPWM30_G2 | 5009 E020h |
EPWM30_G3 | 500D E020h |
EPWM31_G0 | 5001 F020h |
EPWM31_G1 | 5005 F020h |
EPWM31_G2 | 5009 F020h |
EPWM31_G3 | 500D F020h |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED_3 | LDAQBSYNC | LDAQASYNC | |||||
R | R/W | R/W | |||||
0h | 0h | 0h | |||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED_2 | SHDWAQBMODE | RESERVED_1 | SHDWAQAMODE | LDAQBMODE | LDAQAMODE | ||
R | R/W | R | R/W | R/W | R/W | ||
0h | 0h | 0h | 0h | 0h | 0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15:12 | RESERVED_3 | R | 0h | Reserved |
11:10 | LDAQBSYNC | R/W | 0h | Shadow to Active AQCTLB Register Load on SYNC event 00:Shadow to Active Load of AQCTLB occurs according to LDAQBMODE 01:Shadow to Active Load of AQCTLB occurs both according to LDAQBMODE bits and when SYNC occurs. 10:Shadow to Active Load of AQCTLB occurs only when a SYNC is received. 11:Reserved Note: This bit is valid only if AQCTL[SHDWAQBMODE] = 1. |
9:8 | LDAQASYNC | R/W | 0h | Shadow to Active AQCTLA Register Load on SYNC event 00:Shadow to Active Load of AQCTLA occurs according to LDAQAMODE 01:Shadow to Active Load of AQCTLA occurs both according to LDAQAMODE bits and when SYNC occurs. 10:Shadow to Active Load of AQCTLA occurs only when a SYNC is received. 11:Reserved Note: This bit is valid only if AQCTL[SHDWAQAMODE] = 1. |
7 | RESERVED_2 | R | 0h | Reserved |
6 | SHDWAQBMODE | R/W | 0h | Action Qualifier B Register operating mode 1:Shadow mode - operates as a double buffer. All writes via the CPU access Shadow register. 0:Immediate mode - only the Active action qualifier register is used. All writes/reads via the CPU directly access the Active register. |
5 | RESERVED_1 | R | 0h | Reserved |
4 | SHDWAQAMODE | R/W | 0h | Action Qualifier A Register operating mode 1:Shadow mode - operates as a double buffer. All writes via the CPU access Shadow register. 0:Immediate mode - only the Active action qualifier register is used. All writes/reads via the CPU directly access the Active register. |
3:2 | LDAQBMODE | R/W | 0h | Active Action Qualifier B Load from Shadow Select Mode 00:Load on CTR = Zero: Time-base counter equal to zero [TBCTR = 0x0000] 01:Load on CTR = PRD: Time-base counter equal to period [TBCTR = TBPRD] 10:Load on either CTR = Zero or CTR = PRD 11:Freeze [no loads possible] Note: has no effect in Immediate mode. |
1:0 | LDAQAMODE | R/W | 0h | Active Action Qualifier A Load from Shadow Select Mode 00:Load on CTR = Zero: Time-base counter equal to zero [TBCTR = 0x0000] 01:Load on CTR = PRD: Time-base counter equal to period [TBCTR = TBPRD] 10:Load on either CTR = Zero or CTR = PRD 11:Freeze [no loads possible] Note: has no effect in Immediate mode. |