SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Event Trigger Selection Register.
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Instance Name | Physical Address |
---|---|
EPWM0_G0 | 5000 0148h |
EPWM0_G1 | 5004 0148h |
EPWM0_G2 | 5008 0148h |
EPWM0_G3 | 500C 0148h |
EPWM1_G0 | 5000 1148h |
EPWM1_G1 | 5004 1148h |
EPWM1_G2 | 5008 1148h |
EPWM1_G3 | 500C 1148h |
EPWM2_G0 | 5000 2148h |
EPWM2_G1 | 5004 2148h |
EPWM2_G2 | 5008 2148h |
EPWM2_G3 | 500C 2148h |
EPWM3_G0 | 5000 3148h |
EPWM3_G1 | 5004 3148h |
EPWM3_G2 | 5008 3148h |
EPWM3_G3 | 500C 3148h |
EPWM4_G0 | 5000 4148h |
EPWM4_G1 | 5004 4148h |
EPWM4_G2 | 5008 4148h |
EPWM4_G3 | 500C 4148h |
EPWM5_G0 | 5000 5148h |
EPWM5_G1 | 5004 5148h |
EPWM5_G2 | 5008 5148h |
EPWM5_G3 | 500C 5148h |
EPWM6_G0 | 5000 6148h |
EPWM6_G1 | 5004 6148h |
EPWM6_G2 | 5008 6148h |
EPWM6_G3 | 500C 6148h |
EPWM7_G0 | 5000 7148h |
EPWM7_G1 | 5004 7148h |
EPWM7_G2 | 5008 7148h |
EPWM7_G3 | 500C 7148h |
EPWM8_G0 | 5000 8148h |
EPWM8_G1 | 5004 8148h |
EPWM8_G2 | 5008 8148h |
EPWM8_G3 | 500C 8148h |
EPWM9_G0 | 5000 9148h |
EPWM9_G1 | 5004 9148h |
EPWM9_G2 | 5008 9148h |
EPWM9_G3 | 500C 9148h |
EPWM10_G0 | 5000 A148h |
EPWM10_G1 | 5004 A148h |
EPWM10_G2 | 5008 A148h |
EPWM10_G3 | 500C A148h |
EPWM11_G0 | 5000 B148h |
EPWM11_G1 | 5004 B148h |
EPWM11_G2 | 5008 B148h |
EPWM11_G3 | 500C B148h |
EPWM12_G0 | 5000 C148h |
EPWM12_G1 | 5004 C148h |
EPWM12_G2 | 5008 C148h |
EPWM12_G3 | 500C C148h |
EPWM13_G0 | 5000 D148h |
EPWM13_G1 | 5004 D148h |
EPWM13_G2 | 5008 D148h |
EPWM13_G3 | 500C D148h |
EPWM14_G0 | 5000 E148h |
EPWM14_G1 | 5004 E148h |
EPWM14_G2 | 5008 E148h |
EPWM14_G3 | 500C E148h |
EPWM15_G0 | 5000 F148h |
EPWM15_G1 | 5004 F148h |
EPWM15_G2 | 5008 F148h |
EPWM15_G3 | 500C F148h |
EPWM16_G0 | 5001 0148h |
EPWM16_G1 | 5005 0148h |
EPWM16_G2 | 5009 0148h |
EPWM16_G3 | 500D 0148h |
EPWM17_G0 | 5001 1148h |
EPWM17_G1 | 5005 1148h |
EPWM17_G2 | 5009 1148h |
EPWM17_G3 | 500D 1148h |
EPWM18_G0 | 5001 2148h |
EPWM18_G1 | 5005 2148h |
EPWM18_G2 | 5009 2148h |
EPWM18_G3 | 500D 2148h |
EPWM19_G0 | 5001 3148h |
EPWM19_G1 | 5005 3148h |
EPWM19_G2 | 5009 3148h |
EPWM19_G3 | 500D 3148h |
EPWM20_G0 | 5001 4148h |
EPWM20_G1 | 5005 4148h |
EPWM20_G2 | 5009 4148h |
EPWM20_G3 | 500D 4148h |
EPWM21_G0 | 5001 5148h |
EPWM21_G1 | 5005 5148h |
EPWM21_G2 | 5009 5148h |
EPWM21_G3 | 500D 5148h |
EPWM22_G0 | 5001 6148h |
EPWM22_G1 | 5005 6148h |
EPWM22_G2 | 5009 6148h |
EPWM22_G3 | 500D 6148h |
EPWM23_G0 | 5001 7148h |
EPWM23_G1 | 5005 7148h |
EPWM23_G2 | 5009 7148h |
EPWM23_G3 | 500D 7148h |
EPWM24_G0 | 5001 8148h |
EPWM24_G1 | 5005 8148h |
EPWM24_G2 | 5009 8148h |
EPWM24_G3 | 500D 8148h |
EPWM25_G0 | 5001 9148h |
EPWM25_G1 | 5005 9148h |
EPWM25_G2 | 5009 9148h |
EPWM25_G3 | 500D 9148h |
EPWM26_G0 | 5001 A148h |
EPWM26_G1 | 5005 A148h |
EPWM26_G2 | 5009 A148h |
EPWM26_G3 | 500D A148h |
EPWM27_G0 | 5001 B148h |
EPWM27_G1 | 5005 B148h |
EPWM27_G2 | 5009 B148h |
EPWM27_G3 | 500D B148h |
EPWM28_G0 | 5001 C148h |
EPWM28_G1 | 5005 C148h |
EPWM28_G2 | 5009 C148h |
EPWM28_G3 | 500D C148h |
EPWM29_G0 | 5001 D148h |
EPWM29_G1 | 5005 D148h |
EPWM29_G2 | 5009 D148h |
EPWM29_G3 | 500D D148h |
EPWM30_G0 | 5001 E148h |
EPWM30_G1 | 5005 E148h |
EPWM30_G2 | 5009 E148h |
EPWM30_G3 | 500D E148h |
EPWM31_G0 | 5001 F148h |
EPWM31_G1 | 5005 F148h |
EPWM31_G2 | 5009 F148h |
EPWM31_G3 | 500D F148h |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
SOCBEN | SOCBSEL | SOCAEN | SOCASEL | ||||
R/W | R/W | R/W | R/W | ||||
0h | 0h | 0h | 0h | ||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED_1 | INTSELCMP | SOCBSELCMP | SOCASELCMP | INTEN | INTSEL | ||
R | R/W | R/W | R/W | R/W | R/W | ||
0h | 0h | 0h | 0h | 0h | 0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15 | SOCBEN | R/W | 0h | Enable the ADC Start of Conversion B [EPWMxSOCB] Pulse 0:Disable EPWMxSOCB. 1:Enable EPWMxSOCB pulse. |
14:12 | SOCBSEL | R/W | 0h | EPWMxSOCB Selection Options These bits determine when a EPWMxSOCB pulse will be generated. 000:Enable DCBEVT1.soc event 001:Enable event time-base counter equal to zero. [TBCTR = 0x00] 010:Enable event time-base counter equal to period [TBCTR = TBPRD] 011:Enable event time-base counter based on mixed events [ETSOCBMIX]. ETSOCBMIX is configured in the ETSOCBMIXEN register. 100:Enable event time-base counter equal to CMPA when the timer is incrementing or CMPC when the timer is incrementing 101:Enable event time-base counter equal to CMPA when the timer is decrementing or CMPC when the timer is decrementing 110:Enable event: time-base counter equal to CMPB when the timer is incrementing or CMPD when the timer is incrementing 111:Enable event: time-base counter equal to CMPB when the timer is decrementing or CMPD when the timer is decrementing [*] Event selected is determined by SOCBSELCMP bit. |
11 | SOCAEN | R/W | 0h | Enable the ADC Start of Conversion A [EPWMxSOCA] Pulse 0:Disable EPWMxSOCA. 1:Enable EPWMxSOCA pulse. |
10:8 | SOCASEL | R/W | 0h | EPWMxSOCA Selection Options These bits determine when a EPWMxSOCA pulse will be generated. 000:Enable DCAEVT1.soc event 001:Enable event time-base counter equal to zero. [TBCTR = 0x00] 010:Enable event time-base counter equal to period [TBCTR = TBPRD] 011:Enable event time-base counter based on mixed events [ETSOCAMIX]. ETSOCAMIX is configured in the ETSOCAMIXEN register. 100:Enable event time-base counter equal to CMPA when the timer is incrementing or CMPC when the timer is incrementing 101:Enable event time-base counter equal to CMPA when the timer is decrementing or CMPC when the timer is decrementing 110:Enable event: time-base counter equal to CMPB when the timer is incrementing or CMPD when the timer is incrementing 111:Enable event: time-base counter equal to CMPB when the timer is decrementing or CMPD when the timer is decrementing [*] Event selected is determined by SOCASELCMP bit. |
7 | RESERVED_1 | R | 0h | Reserved |
6 | INTSELCMP | R/W | 0h | EPWMxINT Compare Register Selection Options 0:Enable event time-base counter equal to CMPA when the timer is incrementing / Enable event time-base counter equal to CMPA when the timer is decrementing / Enable event: time-base counter equal to CMPB when the timer is incrementing / Enable event: time-base counter equal to CMPB when the timer is decrementing to INTSEL selection mux. 1:Enable event time-base counter equal to CMPC when the timer is incrementing / Enable event time-base counter equal to CMPC when the timer is decrementing / Enable event: time-base counter equal to CMPD when the timer is incrementing / Enable event: time-base counter equal to CMPD when the timer is decrementing to INTSEL selection mux. |
5 | SOCBSELCMP | R/W | 0h | EPWMxSOCB Compare Register Selection Options 0:Enable event time-base counter equal to CMPA when the timer is incrementing / Enable event time-base counter equal to CMPA when the timer is decrementing / Enable event: time-base counter equal to CMPB when the timer is incrementing / Enable event: time-base counter equal to CMPB when the timer is decrementing to SOCBSEL selection mux. 1:Enable event time-base counter equal to CMPC when the timer is incrementing / Enable event time-base counter equal to CMPC when the timer is decrementing / Enable event: time-base counter equal to CMPD when the timer is incrementing / Enable event: time-base counter equal to CMPD when the timer is decrementing to SOCBSEL selection mux. |
4 | SOCASELCMP | R/W | 0h | EPWMxSOCA Compare Register Selection Options 0:Enable event time-base counter equal to CMPA when the timer is incrementing / Enable event time-base counter equal to CMPA when the timer is decrementing / Enable event: time-base counter equal to CMPB when the timer is incrementing / Enable event: time-base counter equal to CMPB when the timer is decrementing to SOCASEL selection mux. 1:Enable event time-base counter equal to CMPC when the timer is incrementing / Enable event time-base counter equal to CMPC when the timer is decrementing / Enable event: time-base counter equal to CMPD when the timer is incrementing / Enable event: time-base counter equal to CMPD when the timer is decrementing to SOCASEL selection mux. |
3 | INTEN | R/W | 0h | Enable EPWM Interrupt [EPWMx_INT] Generation 0:Disable EPWMx_INT generation 1:Enable EPWMx_INT generation |
2:0 | INTSEL | R/W | 0h | EPWM Interrupt [EPWMx_INT] Selection Options 000:Reserved 001:Enable event time-base counter equal to zero. [TBCTR = 0x00] 010:Enable event time-base counter equal to period [TBCTR = TBPRD] 011:Enable event time-base counter based on mixed events [ETINTMIX]. ETINTMIX is configured in the ETINTMIXEN register. 100:Enable event time-base counter equal to CMPA when the timer is incrementing or CMPC when the timer is incrementing 101:Enable event time-base counter equal to CMPA when the timer is decrementing or CMPC when the timer is decrementing 110:Enable event: time-base counter equal to CMPB when the timer is incrementing or CMPD when the timer is incrementing 111:Enable event: time-base counter equal to CMPB when the timer is decrementing or CMPD when the timer is decrementing [*] Event selected is determined by INTSELCMP bit. |