SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Event-Trigger Counter Initialization Control Register.
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Instance Name | Physical Address |
---|---|
EPWM0_G0 | 5000 0164h |
EPWM0_G1 | 5004 0164h |
EPWM0_G2 | 5008 0164h |
EPWM0_G3 | 500C 0164h |
EPWM1_G0 | 5000 1164h |
EPWM1_G1 | 5004 1164h |
EPWM1_G2 | 5008 1164h |
EPWM1_G3 | 500C 1164h |
EPWM2_G0 | 5000 2164h |
EPWM2_G1 | 5004 2164h |
EPWM2_G2 | 5008 2164h |
EPWM2_G3 | 500C 2164h |
EPWM3_G0 | 5000 3164h |
EPWM3_G1 | 5004 3164h |
EPWM3_G2 | 5008 3164h |
EPWM3_G3 | 500C 3164h |
EPWM4_G0 | 5000 4164h |
EPWM4_G1 | 5004 4164h |
EPWM4_G2 | 5008 4164h |
EPWM4_G3 | 500C 4164h |
EPWM5_G0 | 5000 5164h |
EPWM5_G1 | 5004 5164h |
EPWM5_G2 | 5008 5164h |
EPWM5_G3 | 500C 5164h |
EPWM6_G0 | 5000 6164h |
EPWM6_G1 | 5004 6164h |
EPWM6_G2 | 5008 6164h |
EPWM6_G3 | 500C 6164h |
EPWM7_G0 | 5000 7164h |
EPWM7_G1 | 5004 7164h |
EPWM7_G2 | 5008 7164h |
EPWM7_G3 | 500C 7164h |
EPWM8_G0 | 5000 8164h |
EPWM8_G1 | 5004 8164h |
EPWM8_G2 | 5008 8164h |
EPWM8_G3 | 500C 8164h |
EPWM9_G0 | 5000 9164h |
EPWM9_G1 | 5004 9164h |
EPWM9_G2 | 5008 9164h |
EPWM9_G3 | 500C 9164h |
EPWM10_G0 | 5000 A164h |
EPWM10_G1 | 5004 A164h |
EPWM10_G2 | 5008 A164h |
EPWM10_G3 | 500C A164h |
EPWM11_G0 | 5000 B164h |
EPWM11_G1 | 5004 B164h |
EPWM11_G2 | 5008 B164h |
EPWM11_G3 | 500C B164h |
EPWM12_G0 | 5000 C164h |
EPWM12_G1 | 5004 C164h |
EPWM12_G2 | 5008 C164h |
EPWM12_G3 | 500C C164h |
EPWM13_G0 | 5000 D164h |
EPWM13_G1 | 5004 D164h |
EPWM13_G2 | 5008 D164h |
EPWM13_G3 | 500C D164h |
EPWM14_G0 | 5000 E164h |
EPWM14_G1 | 5004 E164h |
EPWM14_G2 | 5008 E164h |
EPWM14_G3 | 500C E164h |
EPWM15_G0 | 5000 F164h |
EPWM15_G1 | 5004 F164h |
EPWM15_G2 | 5008 F164h |
EPWM15_G3 | 500C F164h |
EPWM16_G0 | 5001 0164h |
EPWM16_G1 | 5005 0164h |
EPWM16_G2 | 5009 0164h |
EPWM16_G3 | 500D 0164h |
EPWM17_G0 | 5001 1164h |
EPWM17_G1 | 5005 1164h |
EPWM17_G2 | 5009 1164h |
EPWM17_G3 | 500D 1164h |
EPWM18_G0 | 5001 2164h |
EPWM18_G1 | 5005 2164h |
EPWM18_G2 | 5009 2164h |
EPWM18_G3 | 500D 2164h |
EPWM19_G0 | 5001 3164h |
EPWM19_G1 | 5005 3164h |
EPWM19_G2 | 5009 3164h |
EPWM19_G3 | 500D 3164h |
EPWM20_G0 | 5001 4164h |
EPWM20_G1 | 5005 4164h |
EPWM20_G2 | 5009 4164h |
EPWM20_G3 | 500D 4164h |
EPWM21_G0 | 5001 5164h |
EPWM21_G1 | 5005 5164h |
EPWM21_G2 | 5009 5164h |
EPWM21_G3 | 500D 5164h |
EPWM22_G0 | 5001 6164h |
EPWM22_G1 | 5005 6164h |
EPWM22_G2 | 5009 6164h |
EPWM22_G3 | 500D 6164h |
EPWM23_G0 | 5001 7164h |
EPWM23_G1 | 5005 7164h |
EPWM23_G2 | 5009 7164h |
EPWM23_G3 | 500D 7164h |
EPWM24_G0 | 5001 8164h |
EPWM24_G1 | 5005 8164h |
EPWM24_G2 | 5009 8164h |
EPWM24_G3 | 500D 8164h |
EPWM25_G0 | 5001 9164h |
EPWM25_G1 | 5005 9164h |
EPWM25_G2 | 5009 9164h |
EPWM25_G3 | 500D 9164h |
EPWM26_G0 | 5001 A164h |
EPWM26_G1 | 5005 A164h |
EPWM26_G2 | 5009 A164h |
EPWM26_G3 | 500D A164h |
EPWM27_G0 | 5001 B164h |
EPWM27_G1 | 5005 B164h |
EPWM27_G2 | 5009 B164h |
EPWM27_G3 | 500D B164h |
EPWM28_G0 | 5001 C164h |
EPWM28_G1 | 5005 C164h |
EPWM28_G2 | 5009 C164h |
EPWM28_G3 | 500D C164h |
EPWM29_G0 | 5001 D164h |
EPWM29_G1 | 5005 D164h |
EPWM29_G2 | 5009 D164h |
EPWM29_G3 | 500D D164h |
EPWM30_G0 | 5001 E164h |
EPWM30_G1 | 5005 E164h |
EPWM30_G2 | 5009 E164h |
EPWM30_G3 | 500D E164h |
EPWM31_G0 | 5001 F164h |
EPWM31_G1 | 5005 F164h |
EPWM31_G2 | 5009 F164h |
EPWM31_G3 | 500D F164h |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
SOCBINITEN | SOCAINITEN | INTINITEN | SOCBINITFRC | SOCAINITFRC | INTINITFRC | RESERVED_1 | |
R/W | R/W | R/W | R/W1TS | R/W1TS | R/W1TS | R | |
0h | 0h | 0h | 0h | 0h | 0h | 0h | |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED_1 | |||||||
R | |||||||
0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15 | SOCBINITEN | R/W | 0h | EPWMxSOCB Counter 2 Initialization Enable 0:Has no effect. 1:Enable initialization of EPWMxSOCB counter with contents of ETCNTINIT[SOCBINIT] on a SYNC event or software force. |
14 | SOCAINITEN | R/W | 0h | EPWMxSOCA Counter 2 Initialization Enable 0:Has no effect. 1:Enable initialization of EPWMxSOCA counter with contents of ETCNTINIT[SOCAINIT] on a SYNC event or software force. |
13 | INTINITEN | R/W | 0h | EPWMxINT Counter 2 Initialization Enable 0:Has no effect. 1:Enable initialization of EPWMxINT counter 2 with contents of ETCNTINIT[INTINIT] on a SYNC event or software force. |
12 | SOCBINITFRC | R/W1TS | 0h | EPWMxSOCB Counter 2 Initialization Force 0:Has no effect. 1:This bit forces the ET EPWMxSOCB counter to be initialized with the contents of ETCNTINIT[SOCBINIT]. |
11 | SOCAINITFRC | R/W1TS | 0h | EPWMxSOCA Counter 2 Initialization Force 0:Has no effect. 1:This bit forces the ET EPWMxSOCA counter to be initialized with the contents of ETCNTINIT[SOCAINIT]. |
10 | INTINITFRC | R/W1TS | 0h | EPWMxINT Counter 2 Initialization Force 0:Has no effect. 1:This bit forces the ET EPWMxINT counter to be initialized with the contents of ETCNTINIT[INTINIT]. |
9:0 | RESERVED_1 | R | 0h | Reserved |