SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Digital Compare Filter Offset Counter Register.
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Instance Name | Physical Address |
---|---|
EPWM0_G0 | 5000 0194h |
EPWM0_G1 | 5004 0194h |
EPWM0_G2 | 5008 0194h |
EPWM0_G3 | 500C 0194h |
EPWM1_G0 | 5000 1194h |
EPWM1_G1 | 5004 1194h |
EPWM1_G2 | 5008 1194h |
EPWM1_G3 | 500C 1194h |
EPWM2_G0 | 5000 2194h |
EPWM2_G1 | 5004 2194h |
EPWM2_G2 | 5008 2194h |
EPWM2_G3 | 500C 2194h |
EPWM3_G0 | 5000 3194h |
EPWM3_G1 | 5004 3194h |
EPWM3_G2 | 5008 3194h |
EPWM3_G3 | 500C 3194h |
EPWM4_G0 | 5000 4194h |
EPWM4_G1 | 5004 4194h |
EPWM4_G2 | 5008 4194h |
EPWM4_G3 | 500C 4194h |
EPWM5_G0 | 5000 5194h |
EPWM5_G1 | 5004 5194h |
EPWM5_G2 | 5008 5194h |
EPWM5_G3 | 500C 5194h |
EPWM6_G0 | 5000 6194h |
EPWM6_G1 | 5004 6194h |
EPWM6_G2 | 5008 6194h |
EPWM6_G3 | 500C 6194h |
EPWM7_G0 | 5000 7194h |
EPWM7_G1 | 5004 7194h |
EPWM7_G2 | 5008 7194h |
EPWM7_G3 | 500C 7194h |
EPWM8_G0 | 5000 8194h |
EPWM8_G1 | 5004 8194h |
EPWM8_G2 | 5008 8194h |
EPWM8_G3 | 500C 8194h |
EPWM9_G0 | 5000 9194h |
EPWM9_G1 | 5004 9194h |
EPWM9_G2 | 5008 9194h |
EPWM9_G3 | 500C 9194h |
EPWM10_G0 | 5000 A194h |
EPWM10_G1 | 5004 A194h |
EPWM10_G2 | 5008 A194h |
EPWM10_G3 | 500C A194h |
EPWM11_G0 | 5000 B194h |
EPWM11_G1 | 5004 B194h |
EPWM11_G2 | 5008 B194h |
EPWM11_G3 | 500C B194h |
EPWM12_G0 | 5000 C194h |
EPWM12_G1 | 5004 C194h |
EPWM12_G2 | 5008 C194h |
EPWM12_G3 | 500C C194h |
EPWM13_G0 | 5000 D194h |
EPWM13_G1 | 5004 D194h |
EPWM13_G2 | 5008 D194h |
EPWM13_G3 | 500C D194h |
EPWM14_G0 | 5000 E194h |
EPWM14_G1 | 5004 E194h |
EPWM14_G2 | 5008 E194h |
EPWM14_G3 | 500C E194h |
EPWM15_G0 | 5000 F194h |
EPWM15_G1 | 5004 F194h |
EPWM15_G2 | 5008 F194h |
EPWM15_G3 | 500C F194h |
EPWM16_G0 | 5001 0194h |
EPWM16_G1 | 5005 0194h |
EPWM16_G2 | 5009 0194h |
EPWM16_G3 | 500D 0194h |
EPWM17_G0 | 5001 1194h |
EPWM17_G1 | 5005 1194h |
EPWM17_G2 | 5009 1194h |
EPWM17_G3 | 500D 1194h |
EPWM18_G0 | 5001 2194h |
EPWM18_G1 | 5005 2194h |
EPWM18_G2 | 5009 2194h |
EPWM18_G3 | 500D 2194h |
EPWM19_G0 | 5001 3194h |
EPWM19_G1 | 5005 3194h |
EPWM19_G2 | 5009 3194h |
EPWM19_G3 | 500D 3194h |
EPWM20_G0 | 5001 4194h |
EPWM20_G1 | 5005 4194h |
EPWM20_G2 | 5009 4194h |
EPWM20_G3 | 500D 4194h |
EPWM21_G0 | 5001 5194h |
EPWM21_G1 | 5005 5194h |
EPWM21_G2 | 5009 5194h |
EPWM21_G3 | 500D 5194h |
EPWM22_G0 | 5001 6194h |
EPWM22_G1 | 5005 6194h |
EPWM22_G2 | 5009 6194h |
EPWM22_G3 | 500D 6194h |
EPWM23_G0 | 5001 7194h |
EPWM23_G1 | 5005 7194h |
EPWM23_G2 | 5009 7194h |
EPWM23_G3 | 500D 7194h |
EPWM24_G0 | 5001 8194h |
EPWM24_G1 | 5005 8194h |
EPWM24_G2 | 5009 8194h |
EPWM24_G3 | 500D 8194h |
EPWM25_G0 | 5001 9194h |
EPWM25_G1 | 5005 9194h |
EPWM25_G2 | 5009 9194h |
EPWM25_G3 | 500D 9194h |
EPWM26_G0 | 5001 A194h |
EPWM26_G1 | 5005 A194h |
EPWM26_G2 | 5009 A194h |
EPWM26_G3 | 500D A194h |
EPWM27_G0 | 5001 B194h |
EPWM27_G1 | 5005 B194h |
EPWM27_G2 | 5009 B194h |
EPWM27_G3 | 500D B194h |
EPWM28_G0 | 5001 C194h |
EPWM28_G1 | 5005 C194h |
EPWM28_G2 | 5009 C194h |
EPWM28_G3 | 500D C194h |
EPWM29_G0 | 5001 D194h |
EPWM29_G1 | 5005 D194h |
EPWM29_G2 | 5009 D194h |
EPWM29_G3 | 500D D194h |
EPWM30_G0 | 5001 E194h |
EPWM30_G1 | 5005 E194h |
EPWM30_G2 | 5009 E194h |
EPWM30_G3 | 500D E194h |
EPWM31_G0 | 5001 F194h |
EPWM31_G1 | 5005 F194h |
EPWM31_G2 | 5009 F194h |
EPWM31_G3 | 500D F194h |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
DCFOFFSETCNT | |||||||
R | |||||||
0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
DCFOFFSETCNT | |||||||
R | |||||||
0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15:0 | DCFOFFSETCNT | R | 0h | Blanking Offset Counter These 16-bits are read only and indicate the current value of the offset counter. The counter counts down to zero and then stops until it is re-loaded on the next period or zero event as defined by the DCFCTL[PULSESEL] bit. The offset counter is not affected by the free/soft emulation bits. That is, it will always continue to count down if the device is halted by a emulation stop. |