SPRUJ53A April 2024 – June 2024 TMS320F28P550SJ , TMS320F28P559SJ-Q1
The missing clock detection logic monitors OSCCLK for failure. If the OSCCLK source stops, the PLL is bypassed, OSCCLK is connected to INTOSC1, and an NMI is fired to the CPU. For more information on missing clock detection, see Section 3.7.12.1.