SPRUJ62 December   2022 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Inside the Box
    2. 1.2 Key Features and Interfaces
    3. 1.3 Thermal Compliance
    4. 1.4 Reach Compliance
    5. 1.5 EMC, EMI, and ESD Compliance
  3. 2User Interfaces
    1. 2.1 Power Input
      1. 2.1.1 Power Input [J7] [J3] with LED for Status [LD4][LD5]
      2. 2.1.2 Power Control [SW1] with LED for Status [LD7][LD8][LD9]
      3. 2.1.3 Power Budget Considerations
    2. 2.2 User Inputs
      1. 2.2.1 Board Configuration Settings [SW2] [SW4] [SW13] [SW16]
      2. 2.2.2 Boot Configuration Settings [SW7] [ SW11]
      3. 2.2.3 Reset Pushbuttons [SW9] [ SW10] [SW12] [SW14]
      4. 2.2.4 User Pushbuttons [SW3] [SW5] [SW6] [SW8] [SW15] with User LED Indication [LD2] [LD3]
    3. 2.3 Standard Interfaces
      1. 2.3.1 Uart-Over-USB [J48] [J49] with LED for Status [LD11] [LD12]
      2. 2.3.2 Gigabit Ethernet [J39] [J40] with Integrated LEDs for Status
      3. 2.3.3 USB3.1 Gen1 Interface [J4]
      4. 2.3.4 USB2.0 Interface [J5]
      5. 2.3.5 PCIe Card Slot [J14] [J17]
      6. 2.3.6 Display Port Interfaces [J8] [J9]
      7. 2.3.7 MicroSD Card Cage [J53]
      8. 2.3.8 Stereo Audio Interface [J29]
      9. 2.3.9 JTAG/Emulation Interface [J23] [J1]
    4. 2.4 Expansion Interfaces
      1. 2.4.1  Heatsink [ACC1] with Fan Header [J24]
      2. 2.4.2  CAN-FD Connectors [J41-J46]
      3. 2.4.3  LIN Connectors [J28]
      4. 2.4.4  Serial Ethernet Expansion Interfaces [J52] [J51]
      5. 2.4.5  Camera Interfaces [J55] [J57]
      6. 2.4.6  Automation and Control Connector [J50]
      7. 2.4.7  ADC [J27]
      8. 2.4.8  SPI [J26]
      9. 2.4.9  CSI-TX [J10]
      10. 2.4.10 Accessory Power Connector [J47]
  4. 3Circuit Details
    1. 3.1 Top Level Diagram
    2. 3.2 Interface Mapping
    3. 3.3 I2C Address Mapping
    4. 3.4 GPIO Mapping
    5. 3.5 Power Monitoring
    6. 3.6 Shared Interfaces / Signal Muxing
    7. 3.7 Power Delivery Network (PDN)
    8. 3.8 Identification EEPROM

2.2.2 Boot Configuration Settings [SW7] [ SW11]

Dip switches [SW7] [SW11] are used to configure different boot options available on the processor.

Two common boot mode settings are documented below. For a complete definition and list of all supported modes, see the TDA4AP-Q1/TDA4VP-Q1/TDA4AH-Q1/TDA4VH-Q1 Technical Reference Manual (TRM).

No Boot: The processor will not attempt to boot any software. This is often selected when downloading software using an emulator.

SW7 [8:1] = 0000 1110

SW11[8:1] = 0001 0001

SD Card Boot: The processor will attempt to boot from image on SD Card.

SW7[8:1] = 0000 0000 (Default)

SW11 [8:1] = 0100 0001 (Default)

The Dip Switch boot tables are formatted to align with how the settings are documented in the TRM.

Table 2-6 Dip Switch [SW7] Configuration for MCU_BOOTMODE
MCU_BOOTMODE Pin Mapping

0:2

[SW7.1]

3

[SW7.2]

4

[SW7.3]

5

[SW7.4]

6

[SW7. 5]

7

[SW7.6]

8

[SW7.7]

9

[SW7.8]

PLL Configuration

Must be set to ‘0’ (OFF)

 Primary Boot Mode A MCU Only

Reserved

Must be set to ‘0’ (OFF)

 POST Config
Table 2-7 Dip Switch [SW11] Configuration for BOOTMODE
BOOTMODE Pin Mapping

0

[SW11.1]

1

[SW11.2]

2

[SW11.3]

3

[SW11.4]

4

[SW11.5]

5

[SW11.6]

6

[SW11.7]

7

[SW11.8]
Primary Boot B Backup Boot Mode Primary Boot Mode Config Backup Boot Mode Config