SPRUJ66A February   2023  – December 2023

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1EVM Revisions and Assembly Variants
  5. 2Inside the Box
  6. 3EMC, EMI, and ESD Compliance
  7. 4System Description
    1. 4.1 Key Features
      1. 4.1.1 Processor
      2. 4.1.2 Power Supply
      3. 4.1.3 Memory
      4. 4.1.4 JTAG Emulator
      5. 4.1.5 Supported Interfaces and Peripherals
      6. 4.1.6 Expansion Connectors Headers to Support Application Specific Add On Boards
    2. 4.2 Functional Block Diagram
    3. 4.3 AM62A Low Power SK EVM Interface Mapping
    4. 4.4 Power ON/OFF Procedures
      1. 4.4.1 Power-On Procedure
      2. 4.4.2 Power-Off Procedure
      3. 4.4.3 Power Test Points
    5. 4.5 Peripheral and Major Component Description
      1. 4.5.1  Clocking
        1. 4.5.1.1 Peripheral Ref Clock
      2. 4.5.2  Reset
      3. 4.5.3  CSI Interface
      4. 4.5.4  Audio Codec Interface
      5. 4.5.5  HDMI Display Interface
      6. 4.5.6  JTAG Interface
      7. 4.5.7  Test Automation Header
      8. 4.5.8  UART Interface
      9. 4.5.9  USB Interface
        1. 4.5.9.1 USB 2 0 Type A Interface
        2. 4.5.9.2 USB 2 0 Type C Interface
      10. 4.5.10 Memory Interfaces
        1. 4.5.10.1 LPDDR4 Interface
        2. 4.5.10.2 OSPI Interface
        3. 4.5.10.3 MMC Interfaces
          1. 4.5.10.3.1 MMC0 - eMMC Interface
          2. 4.5.10.3.2 MMC1 - Micro SD Interface
          3. 4.5.10.3.3 MMC2 - M.2 Key E Interface
        4. 4.5.10.4 Board ID EEPROM
      11. 4.5.11 Ethernet Interface
        1. 4.5.11.1 CPSW Ethernet PHY Default Configuration
      12. 4.5.12 GPIO Port Expander
      13. 4.5.13 GPIO Mapping
      14. 4.5.14 Power
        1. 4.5.14.1 Power Requirements
        2. 4.5.14.2 Power Input
        3. 4.5.14.3 Power Supply
        4. 4.5.14.4 AM62A SoC Power
        5. 4.5.14.5 Current Monitoring
      15. 4.5.15 AM62A Low Power SK EVM User Setup and Configuration
        1. 4.5.15.1 Boot Modes
        2. 4.5.15.2 User Test LEDs
      16. 4.5.16 Expansion Headers
        1. 4.5.16.1 User Expansion Connector
        2. 4.5.16.2 MCU Connector
      17. 4.5.17 I2C Address Mapping
  8. 5Revision History

4.5.14.4 AM62A SoC Power

The Core voltage of the AM62A SOC can be 0.75 V or 0.85 V based on the PMIC Configuration and on the power optimization requirement. By Default the PMIC is configured to supply VDD_CORE to 0.75V. It can be changed to 0.85V by changing the PMIC Configuration register. Current monitors are provided on all the SOC Power rails.

The SOC has different IO groups. Each IO group is powered by specific power supplies as listed in the table below:

Table 4-10 Soc Power Supply
Sl.No Power Supply SoC Supply Rails IO Power Group Voltage
1 VDD_CORE VDDA_CORE_USB USB

0.75/ 0.85
VDDA_CORE_CSI CSI
VDD_CANUART CANUART
VDD_CORE CORE
2 VDDR_CORE VDDR_CORE CORE 0.85
3 VDDA_1V8 VDDA_1V8_CSIRX CSI

1.8
VDDA_1V8_USB USB
VDDA_1V8_MCU MCU GENERAL
VDDA_1V8_OSCO OSCO
VDDA_PLL[0:4]
4 VDD_LPDDR4 VDDS_DDR

DDR0

1.1
VDDS_DDR_C
5 CAN_IO_3V3 VDDSHV_CANUART CANUART 3.3
6 VPP_1V8 VPP_1V8 1.8
7 SoC_VDDSHV5_SDIO VDDSHV5 MMC1 3.3/ 1.8
8 SOC_DVDD1V8 VDDSHV1 OSPI 1.8
VDDSHV4 MMC0
VDDSHV6 MMC2
VMON_1P8_SOC
9 SOC_DVDD3V3 VDDSHV0 GENERAL

3.3
VDDSHV2 RGMII
VDDSHV3 GPMC
VDDSHV_MCU MCU GENERAL
VMON_3P3_SOC
VDDA_3P3_USB USB