SPRUJ66A February   2023  – December 2023

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1EVM Revisions and Assembly Variants
  5. 2Inside the Box
  6. 3EMC, EMI, and ESD Compliance
  7. 4System Description
    1. 4.1 Key Features
      1. 4.1.1 Processor
      2. 4.1.2 Power Supply
      3. 4.1.3 Memory
      4. 4.1.4 JTAG Emulator
      5. 4.1.5 Supported Interfaces and Peripherals
      6. 4.1.6 Expansion Connectors Headers to Support Application Specific Add On Boards
    2. 4.2 Functional Block Diagram
    3. 4.3 AM62A Low Power SK EVM Interface Mapping
    4. 4.4 Power ON/OFF Procedures
      1. 4.4.1 Power-On Procedure
      2. 4.4.2 Power-Off Procedure
      3. 4.4.3 Power Test Points
    5. 4.5 Peripheral and Major Component Description
      1. 4.5.1  Clocking
        1. 4.5.1.1 Peripheral Ref Clock
      2. 4.5.2  Reset
      3. 4.5.3  CSI Interface
      4. 4.5.4  Audio Codec Interface
      5. 4.5.5  HDMI Display Interface
      6. 4.5.6  JTAG Interface
      7. 4.5.7  Test Automation Header
      8. 4.5.8  UART Interface
      9. 4.5.9  USB Interface
        1. 4.5.9.1 USB 2 0 Type A Interface
        2. 4.5.9.2 USB 2 0 Type C Interface
      10. 4.5.10 Memory Interfaces
        1. 4.5.10.1 LPDDR4 Interface
        2. 4.5.10.2 OSPI Interface
        3. 4.5.10.3 MMC Interfaces
          1. 4.5.10.3.1 MMC0 - eMMC Interface
          2. 4.5.10.3.2 MMC1 - Micro SD Interface
          3. 4.5.10.3.3 MMC2 - M.2 Key E Interface
        4. 4.5.10.4 Board ID EEPROM
      11. 4.5.11 Ethernet Interface
        1. 4.5.11.1 CPSW Ethernet PHY Default Configuration
      12. 4.5.12 GPIO Port Expander
      13. 4.5.13 GPIO Mapping
      14. 4.5.14 Power
        1. 4.5.14.1 Power Requirements
        2. 4.5.14.2 Power Input
        3. 4.5.14.3 Power Supply
        4. 4.5.14.4 AM62A SoC Power
        5. 4.5.14.5 Current Monitoring
      15. 4.5.15 AM62A Low Power SK EVM User Setup and Configuration
        1. 4.5.15.1 Boot Modes
        2. 4.5.15.2 User Test LEDs
      16. 4.5.16 Expansion Headers
        1. 4.5.16.1 User Expansion Connector
        2. 4.5.16.2 MCU Connector
      17. 4.5.17 I2C Address Mapping
  8. 5Revision History

4.4.3 Power Test Points

Test points for each power output on the board are mentioned in Table 2.

Table 4-2 Power test points
Sl # Power Supply TestPoint Voltage
1 VDD_1V2 TP13 1.2
2 VDDSHV_SDIO TP34 3.3/ 1.8
3 VPP_1V8 TP35 1.8
4 VDDA1V8 TP40 1.8
5 VCC_0V85 TP30 0.85
6 VCC1V8_SYS TP32 1.8
7 VCC_CORE TP25 0.75
8 VCC1V1 TP39 1.1
9 VMAIN TP68 12
10 VCC_5V0 TP73 5
11 VCC3V3_TA TP88 3.3
12 VCC3V3_XDS TP79 3.3
13 VCC_3V3_SYS TP47 3.3
14 VCC_3V3_MAIN TP46 3.3
15 VDD_2V5 TP29 2.5
16 VDD_1V0 TP17 1
17 VINT_PMIC_1V8 TP101 1.8
18 VRTC_PMIC_1V8 TP37 1.8
19 VDD_CANUART C507.1 0.75
20 VDD_MMC1 FL5.1 3.3
21 XDS_USB_VBUS TP89 5
22 VCC3V3_EXP J3.1 3.3
23 VCC5V0_EXP J3.2 5
24 VBUS_5V0_TYPEA U30.4 5
25 VCC_CSI_IO C8.1 1.8/ 3.3
26 VBUS_TYPEC1 C118.1 12
27 VBUS_TYPEC2 R203.1 12
28 VCC_3V3_FT4232 C152.2 3.3
29 LDO_3V3 U34.8 3.3
30 LDO_1V8 C122.1 1.8
31 FT4232_USB_VBUS J17.1 5
32 VCC_5V0_HDMICONN J5.18 5
33 VCC_1V8_FT4232 C157.2 1.8