SPRUJ71 august   2023

 

  1.   1
  2.   C2000 F28P65x Series LaunchPad Development Kit
  3.   Trademarks
  4. 1Board Overview
    1. 1.1 Kit Contents
    2. 1.2 Features
    3. 1.3 Specifications
      1. 1.3.1 External Power Supply or Accessory Requirements
    4. 1.4 Using the F28P65x LaunchPad
    5. 1.5 BoosterPacks
    6. 1.6 Hardware Revisions
      1. 1.6.1 Revision A
  5. 2Software Development
    1. 2.1 Software Tools and Packages
    2. 2.2 F28P65x LaunchPad Demo Program
    3. 2.3 Programming and Running Other Software on the F28P65x LaunchPad
  6. 3Hardware Description
    1. 3.1 Functional Description and Connections
      1. 3.1.1  Microcontroller
      2. 3.1.2  Power Domains
      3. 3.1.3  LEDs
      4. 3.1.4  Encoder Connectors
      5. 3.1.5  FSI
      6. 3.1.6  CAN
      7. 3.1.7  EtherCAT
      8. 3.1.8  CLB
      9. 3.1.9  Boot Modes
      10. 3.1.10 BoosterPack Sites
      11. 3.1.11 Analog Voltage Reference
      12. 3.1.12 Differential ADC Header
      13. 3.1.13 Other Headers and Jumpers
        1. 3.1.13.1 XDS Isolation Block
        2. 3.1.13.2 BoosterPack Site 2 Power Isolation
        3. 3.1.13.3 Alternate Power
    2. 3.2 Debug Interface
      1. 3.2.1 XDS110 Debug Probe
      2. 3.2.2 XDS110 Output
      3. 3.2.3 Virtual COM Port
    3. 3.3 Alternate Routing
      1. 3.3.1 Overview
      2. 3.3.2 UART Routing
      3. 3.3.3 EQEP Routing
      4. 3.3.4 CAN Routing
      5. 3.3.5 FSI Routing
      6. 3.3.6 PWM DAC
  7. 4Board Design
    1. 4.1 Schematic
    2. 4.2 PCB Layout
    3. 4.3 BOM
    4. 4.4 LAUNCHXL-F28P65X Board Dimensions
  8. 5Frequently Asked Questions
  9. 6References
    1. 6.1 Reference Documents
    2. 6.2 Other TI Components Used in This Design

3.3.2 UART Routing

This LaunchPad allows for one of two sets of pins to be used for the SCI UART routed to the virtual COM port of the XDS110. By default, GPIO43 (SCIA_RX) and GPIO42 (SCIA_TX) are routed to the virtual COM port and not available on the BoosterPack connector. Alternately, GPIO55 (SCIB_RX) and GPIO38 (SCIB_TX) can be routed to the virtual COM port. When UART functionality is not needed at the virtual COM port, the GPIOs can be routed to the BoosterPack connectors for BoosterPack standard functions.

The routing destination of these signal pairs are selected using the on-board switch S2, as described in Table 3-8.

Table 3-8 SCI UART Select Table - S2
SEL1 (Left)SEL2 (Right)GPIO42/43GPIO38/55
00XDS110 COM PortBP Headers
01XDS110 COM PortNo Connect
10BP HeadersBP Headers
11BP HeadersXDS110 COM Port

Note that signals GPIO42/43 are compatible with both the SCIA and UARTA peripherals, allowing for greater flexibility. Signals GPIO38/55 are only compatible with the SCIB peripheral.