SPRUJ73 December   2023

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
      1. 1.1.1 Read This First
        1. 1.1.1.1 Sitara MCU+ Academy
        2. 1.1.1.2 Important Usage Notes
    2. 1.2 Kit Contents
  6. 2Hardware Description
    1. 2.1 Component Identification
    2. 2.2 Power Requirements
      1. 2.2.1 Power Input Using USB Type-C Connector
      2. 2.2.2 Power Status LEDs
      3. 2.2.3 Power Tree
    3. 2.3 Functional Block Diagram
    4. 2.4 Header Information
    5. 2.5 Interfaces
      1. 2.5.1 ADC
      2. 2.5.2 LIN
      3. 2.5.3 MCAN
      4. 2.5.4 TRACE/GPMC Muxing Scheme
      5. 2.5.5 GPMC Memory Interface
        1. 2.5.5.1 PSRAM
        2. 2.5.5.2 GPMC Memory Footprint
        3. 2.5.5.3 NOR FLASH
      6. 2.5.6 TI 14-Pin Header
      7. 2.5.7 MIPI-60 Connector
    6. 2.6 HSEC Pinout
  7. 3Additional Information
    1. 3.1 If You Need Assistance
    2.     Trademarks
  8. 4References
    1. 4.1 Reference Documents
    2. 4.2 Other TI Components Used in This Design
  9. 5Revision History

PSRAM

The AM263x controlCARD Docking Station has a 64Mbit PSRAM memory device (IS67WVEM16EBLL-70BLA1), which is connected to the GPMC0 interface of the AM263x SoC. The PSRAM is powered by the 3.3-V system supply.

Note: There is typically a reset pin for Flash memory. The Reset pin is not present in the TFBGA-48 package that is used on the controlCARD Docking Station.

GUID-20230201-SS0I-XNHG-RG7V-4XBH7TQMVHNQ-low.png Figure 2-12 GPMC-PSRAM Interface

The GPMC signals originating from the AM263x SoC are passed through the HSEC connector onto the Docking Station. The TRACE/GPMC multiplexing scheme sends the GPMC signals to the installed IS67WVEM16EBLL-70BLA1 64Mb PSRAM module for interfacing with an external memory device. Refer to Table 3-14 for details on the MUX scheme operation.

All select and enable signals are to be pulled high via 10 kΩ resistors to ensure functionality of the active low signals.

Table 2-15 PSRAM Signal Descriptions
AM263x Signal IS67WVEM16EBLL-70BLA1 64Mb PSRAM Signal
GPMC0_A[21:0] GPMC Address Output A[21:0] Address Input A[21:0]
GPMC0_AD[15:0] GPMC Data Input/Output DQ[15:0] Data Inputs/Outputs DQ[15:0]
GPMC0_CSn0 GPMC Chip Select 0 (active low) C̅E̅ Chip Enable/Select
GPMC0_WEn GPMC Write Enable (active low) W̅E̅ Write Enable
GPMC0_OEn_REn GPMC Output Enable (active low) or Read Enable (active low) O̅E̅ Output Enable
GPMC0_BE0n_CLE GPMC Lower-Byte Enable (active low) or Command Latch Enable L̅B̅ Lower Byte Select
GPMC0_BE1n GPMC Upper-Byte Enable (active low) U̅B̅ Upper Byte Select
GPMC0_WAIT0 GPMC External Indication of Wait N/A N/A
GPMC0_WPn GPMC Flash Write Protect (active low) N/A N/A
GPIO45 General-Purpose IO 45 N/A N/A
GPIO46 General-Purpose IO 46 N/A N/A
GPIO48 General-Purpose IO 48 Z̅Z̅ Sleep Enable