SPRUJ73 December   2023

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
      1. 1.1.1 Read This First
        1. 1.1.1.1 Sitara MCU+ Academy
        2. 1.1.1.2 Important Usage Notes
    2. 1.2 Kit Contents
  6. 2Hardware Description
    1. 2.1 Component Identification
    2. 2.2 Power Requirements
      1. 2.2.1 Power Input Using USB Type-C Connector
      2. 2.2.2 Power Status LEDs
      3. 2.2.3 Power Tree
    3. 2.3 Functional Block Diagram
    4. 2.4 Header Information
    5. 2.5 Interfaces
      1. 2.5.1 ADC
      2. 2.5.2 LIN
      3. 2.5.3 MCAN
      4. 2.5.4 TRACE/GPMC Muxing Scheme
      5. 2.5.5 GPMC Memory Interface
        1. 2.5.5.1 PSRAM
        2. 2.5.5.2 GPMC Memory Footprint
        3. 2.5.5.3 NOR FLASH
      6. 2.5.6 TI 14-Pin Header
      7. 2.5.7 MIPI-60 Connector
    6. 2.6 HSEC Pinout
  7. 3Additional Information
    1. 3.1 If You Need Assistance
    2.     Trademarks
  8. 4References
    1. 4.1 Reference Documents
    2. 4.2 Other TI Components Used in This Design
  9. 5Revision History

2.5.4 TRACE/GPMC Muxing Scheme

On the AM263x SoC, the GPMC signals are pinmuxed with the TRACE data signals. Four TS3DDR3812RUAR 12-channel high speed multiplexers are used to separate the signals and enables both TRACE emulation and GPMC usage on the AM263x controlCARD Docking Station.

GUID-20230111-SS0I-2XQR-ZH1D-2CGF2G2SWLHT-low.png Figure 2-10 TRACE/GPMC Signal Muxing

GPIO44 from the AM263x SoC (HSEC pin 51) is the enable bit on all multiplexers. GPIO47 from the AM263x SoC (HSEC pin 50) is connected to both select bits on U4 and U7. By default, these signals are pulled up to the 3.3V IO rail, with the default signal output being the TRACE signals. The GPMC driver in the AM263x MCU+ SDK pulls GPIO47 low to allow the multiplexers to pass the GPMC signals.

U4 and U7 multiplex both TRACE and GPMC signals, while U5 and U6 do not have configurable select bits and only pass GPMC signals. There are more GPMC signals than TRACE signals, and this keeps timing consistent across all GPMC nets.

Table 2-14 MUX Function Table
EN SEL1 SEL2 Mux Function controlCARD
Signal Routing
L X X A0 to A11, B0 to B11, and C0 to C11 are Hi-Z N/A
H L L A0 to A5 = B0 to B5
A6 to A11 = B6 to B11		 GPMC Selected
H L H A0 to A5 = B0 to B5
A6 to A11 = C6 to C11		 N/A
H H L A0 to A5 = C0 to C5
A6 to A11 = B6 to B11		 N/A
H H H A0 to A5 = C0 to C5
A6 to A11 = C6 to C11		 TRACE Selected
(default)