SPRUJ81A February   2023  – January 2025 AM62A1-Q1 , AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM62D-Q1

 

  1.   1
  2.   Trademarks
  3. 1 Introduction
  4. 2 Width/Spacing Proposal for Escapes
  5. 3 Stackup
  6. 4 Via Sharing
  7. 5 Floorplan Component Placement
  8. 6 Critical Interfaces Impact Placement
  9. 7 Routing Priority
  10. 8 SerDes Interfaces
  11. 9 DDR Interfaces
  12. 10Power Decoupling
  13. 11Route Lowest Priority Interfaces Last
  14. 12Summary
  15. 13References
  16. 14Revision History

2 Width/Spacing Proposal for Escapes

The AM62Ax/AM62Dx has been designed to support the following. The AM62Ax/AM62Dx package supports a similar feature set as several other competing solutions with smaller package area and wider line width. This solution reduces PCB foot print and utilizes lower cost PCB rules, enabling compact and low-cost systems.

Table 2-1 Width/Spacing Proposal for Escapes
PCB Feature PCB Routing Requirements Comments
Minimum via diameter 18 mils Via pads dia - 18Mils
Via hole dia - 8Mils
Via hole size 8 mils
Minimum trace width/spacing required in the BGA breakout (Inner Layer) Trace width – 3.5mils
Spacing – 3.49mils
Minimum trace width/spacing required in the BGA breakout (External Layer) Trace width – 3.5mils
Spacing – 4mils
Number of layers used for escape 8
  • Top (1 Layer)
  • Signal (3 Layer)
  • Power (3 Layer)
  • Bottom (1 Layer)
BGA land pad size 18mils
Package Size 18mm × 18mm
PCB layers (signal routing, total) recommended
  • Top (1 Layer)
  • Signal (3 Layer)
  • Power (3 Layer)
  • Ground (4 Layer)
  • Bottom (1 Layer)